rename methods

src/nrf24l01.cpp

@@ -6,7 +6,7 @@
 #define SPI_CHECK_ENABLED(SPIx)             if (!((SPIx)->CR1 & SPI_CR1_SPE)) {return;}
 #define SPI_CHECK_ENABLED_RESP(SPIx, val)   if (!((SPIx)->CR1 & SPI_CR1_SPE)) {return (val);}
 
-
+// ----------------- SPI HELPER FUNCTIONS ---------------------------------//
 static __INLINE uint8_t SPI_Send(SPI_TypeDef* SPIx, uint8_t data) {
     /* Check if SPI is enabled */
     SPI_CHECK_ENABLED_RESP(SPIx, 0);
@@ -81,7 +81,7 @@ void SPI_SendMulti(SPI_TypeDef* SPIx, uint8_t* dataOut, uint8_t* dataIn, uint32_
 		*dataIn++ = *(__IO uint8_t *)&SPIx->DR;
 	}
 }
-//--------------------------------------------------------------------------------
+//----------------------------- NRF240L01 ----------------------------------------------//
 
 Nrf24L01::Nrf24L01(uint8_t channel, SPI_HandleTypeDef *spi, GPIO_TypeDef *port_cs, uint16_t pin_cs, GPIO_TypeDef *port_ce, uint16_t pin_ce){
 	_spi = spi;
@@ -97,10 +97,10 @@ Nrf24L01::Nrf24L01(uint8_t channel, SPI_HandleTypeDef *spi, GPIO_TypeDef *port_c
 
 
 
-void Nrf24L01::TM_NRF24L01_WriteBit(uint8_t reg, uint8_t bit, uint8_t value) {
+void Nrf24L01::writeBit(uint8_t reg, uint8_t bit, uint8_t value) {
 	uint8_t tmp;
 	/* Read register */
-	tmp = TM_NRF24L01_ReadRegister(reg);
+	tmp = readRegister(reg);
 	/* Make operation */
 	if (value) {
 		tmp |= 1 << bit;
@@ -108,19 +108,19 @@ void Nrf24L01::TM_NRF24L01_WriteBit(uint8_t reg, uint8_t bit, uint8_t value) {
 		tmp &= ~(1 << bit);
 	}
 	/* Write back */
-	TM_NRF24L01_WriteRegister(reg, tmp);
+	writeRegister(reg, tmp);
 }
 
-uint8_t Nrf24L01::TM_NRF24L01_ReadBit(uint8_t reg, uint8_t bit) {
+uint8_t Nrf24L01::readBit(uint8_t reg, uint8_t bit) {
 	uint8_t tmp;
-	tmp = TM_NRF24L01_ReadRegister(reg);
+	tmp = readRegister(reg);
 	if (!NRF24L01_CHECK_BIT(tmp, bit)) {
 		return 0;
 	}
 	return 1;
 }
 
-uint8_t Nrf24L01::TM_NRF24L01_ReadRegister(uint8_t reg) {
+uint8_t Nrf24L01::readRegister(uint8_t reg) {
 	uint8_t value;
 //	NRF24L01_CSN_LOW;
 	PIN_LOW(_cs_port, _cs_pin);
@@ -132,7 +132,7 @@ uint8_t Nrf24L01::TM_NRF24L01_ReadRegister(uint8_t reg) {
 	return value;
 }
 
-void Nrf24L01::TM_NRF24L01_ReadRegisterMulti(uint8_t reg, uint8_t* data, uint8_t count) {
+void Nrf24L01::readRegisterMulti(uint8_t reg, uint8_t* data, uint8_t count) {
 //	NRF24L01_CSN_LOW;
 	PIN_LOW(_cs_port, _cs_pin);
 	SPI_Send(_spi->Instance, NRF24L01_READ_REGISTER_MASK(reg));
@@ -141,7 +141,7 @@ void Nrf24L01::TM_NRF24L01_ReadRegisterMulti(uint8_t reg, uint8_t* data, uint8_t
 	PIN_HIGH(_cs_port, _cs_pin);
 }
 
-void Nrf24L01::TM_NRF24L01_WriteRegister(uint8_t reg, uint8_t value) {
+void Nrf24L01::writeRegister(uint8_t reg, uint8_t value) {
 //	NRF24L01_CSN_LOW;
 	PIN_LOW(_cs_port, _cs_pin);
 	SPI_Send(_spi->Instance, NRF24L01_WRITE_REGISTER_MASK(reg));
@@ -150,7 +150,7 @@ void Nrf24L01::TM_NRF24L01_WriteRegister(uint8_t reg, uint8_t value) {
 	PIN_HIGH(_cs_port, _cs_pin);
 }
 
-void Nrf24L01::TM_NRF24L01_WriteRegisterMulti(uint8_t reg, uint8_t *data, uint8_t count) {
+void Nrf24L01::writeRegisterMulti(uint8_t reg, uint8_t *data, uint8_t count) {
 //	NRF24L01_CSN_LOW;
 	PIN_LOW(_cs_port, _cs_pin);
 	SPI_Send(_spi->Instance, NRF24L01_WRITE_REGISTER_MASK(reg));
@@ -163,16 +163,16 @@ void Nrf24L01::TM_NRF24L01_WriteRegisterMulti(uint8_t reg, uint8_t *data, uint8_
 void Nrf24L01::softwareReset(void) {
 	uint8_t data[5];
 
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_CONFIG, 		NRF24L01_REG_DEFAULT_VAL_CONFIG);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_EN_AA,		NRF24L01_REG_DEFAULT_VAL_EN_AA);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_EN_RXADDR, 	NRF24L01_REG_DEFAULT_VAL_EN_RXADDR);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_SETUP_AW, 	NRF24L01_REG_DEFAULT_VAL_SETUP_AW);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_SETUP_RETR, 	NRF24L01_REG_DEFAULT_VAL_SETUP_RETR);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RF_CH, 		NRF24L01_REG_DEFAULT_VAL_RF_CH);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RF_SETUP, 	NRF24L01_REG_DEFAULT_VAL_RF_SETUP);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_STATUS, 		NRF24L01_REG_DEFAULT_VAL_STATUS);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_OBSERVE_TX, 	NRF24L01_REG_DEFAULT_VAL_OBSERVE_TX);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RPD, 		NRF24L01_REG_DEFAULT_VAL_RPD);
+	writeRegister(NRF24L01_REG_CONFIG, 		NRF24L01_REG_DEFAULT_VAL_CONFIG);
+	writeRegister(NRF24L01_REG_EN_AA,		NRF24L01_REG_DEFAULT_VAL_EN_AA);
+	writeRegister(NRF24L01_REG_EN_RXADDR, 	NRF24L01_REG_DEFAULT_VAL_EN_RXADDR);
+	writeRegister(NRF24L01_REG_SETUP_AW, 	NRF24L01_REG_DEFAULT_VAL_SETUP_AW);
+	writeRegister(NRF24L01_REG_SETUP_RETR, 	NRF24L01_REG_DEFAULT_VAL_SETUP_RETR);
+	writeRegister(NRF24L01_REG_RF_CH, 		NRF24L01_REG_DEFAULT_VAL_RF_CH);
+	writeRegister(NRF24L01_REG_RF_SETUP, 	NRF24L01_REG_DEFAULT_VAL_RF_SETUP);
+	writeRegister(NRF24L01_REG_STATUS, 		NRF24L01_REG_DEFAULT_VAL_STATUS);
+	writeRegister(NRF24L01_REG_OBSERVE_TX, 	NRF24L01_REG_DEFAULT_VAL_OBSERVE_TX);
+	writeRegister(NRF24L01_REG_RPD, 		NRF24L01_REG_DEFAULT_VAL_RPD);
 
 	//P0
 	data[0] = NRF24L01_REG_DEFAULT_VAL_RX_ADDR_P0_0;
@@ -180,7 +180,7 @@ void Nrf24L01::softwareReset(void) {
 	data[2] = NRF24L01_REG_DEFAULT_VAL_RX_ADDR_P0_2;
 	data[3] = NRF24L01_REG_DEFAULT_VAL_RX_ADDR_P0_3;
 	data[4] = NRF24L01_REG_DEFAULT_VAL_RX_ADDR_P0_4;
-	TM_NRF24L01_WriteRegisterMulti(NRF24L01_REG_RX_ADDR_P0, data, 5);
+	writeRegisterMulti(NRF24L01_REG_RX_ADDR_P0, data, 5);
 
 	//P1
 	data[0] = NRF24L01_REG_DEFAULT_VAL_RX_ADDR_P1_0;
@@ -188,12 +188,12 @@ void Nrf24L01::softwareReset(void) {
 	data[2] = NRF24L01_REG_DEFAULT_VAL_RX_ADDR_P1_2;
 	data[3] = NRF24L01_REG_DEFAULT_VAL_RX_ADDR_P1_3;
 	data[4] = NRF24L01_REG_DEFAULT_VAL_RX_ADDR_P1_4;
-	TM_NRF24L01_WriteRegisterMulti(NRF24L01_REG_RX_ADDR_P1, data, 5);
+	writeRegisterMulti(NRF24L01_REG_RX_ADDR_P1, data, 5);
 
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RX_ADDR_P2, 	NRF24L01_REG_DEFAULT_VAL_RX_ADDR_P2);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RX_ADDR_P3, 	NRF24L01_REG_DEFAULT_VAL_RX_ADDR_P3);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RX_ADDR_P4, 	NRF24L01_REG_DEFAULT_VAL_RX_ADDR_P4);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RX_ADDR_P5, 	NRF24L01_REG_DEFAULT_VAL_RX_ADDR_P5);
+	writeRegister(NRF24L01_REG_RX_ADDR_P2, 	NRF24L01_REG_DEFAULT_VAL_RX_ADDR_P2);
+	writeRegister(NRF24L01_REG_RX_ADDR_P3, 	NRF24L01_REG_DEFAULT_VAL_RX_ADDR_P3);
+	writeRegister(NRF24L01_REG_RX_ADDR_P4, 	NRF24L01_REG_DEFAULT_VAL_RX_ADDR_P4);
+	writeRegister(NRF24L01_REG_RX_ADDR_P5, 	NRF24L01_REG_DEFAULT_VAL_RX_ADDR_P5);
 
 	//TX
 	data[0] = NRF24L01_REG_DEFAULT_VAL_TX_ADDR_0;
@@ -201,21 +201,21 @@ void Nrf24L01::softwareReset(void) {
 	data[2] = NRF24L01_REG_DEFAULT_VAL_TX_ADDR_2;
 	data[3] = NRF24L01_REG_DEFAULT_VAL_TX_ADDR_3;
 	data[4] = NRF24L01_REG_DEFAULT_VAL_TX_ADDR_4;
-	TM_NRF24L01_WriteRegisterMulti(NRF24L01_REG_TX_ADDR, data, 5);
-
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RX_PW_P0, 	NRF24L01_REG_DEFAULT_VAL_RX_PW_P0);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RX_PW_P1, 	NRF24L01_REG_DEFAULT_VAL_RX_PW_P1);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RX_PW_P2, 	NRF24L01_REG_DEFAULT_VAL_RX_PW_P2);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RX_PW_P3, 	NRF24L01_REG_DEFAULT_VAL_RX_PW_P3);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RX_PW_P4, 	NRF24L01_REG_DEFAULT_VAL_RX_PW_P4);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RX_PW_P5, 	NRF24L01_REG_DEFAULT_VAL_RX_PW_P5);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_FIFO_STATUS, NRF24L01_REG_DEFAULT_VAL_FIFO_STATUS);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_DYNPD, 		NRF24L01_REG_DEFAULT_VAL_DYNPD);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_FEATURE, 	NRF24L01_REG_DEFAULT_VAL_FEATURE);
+	writeRegisterMulti(NRF24L01_REG_TX_ADDR, data, 5);
+
+	writeRegister(NRF24L01_REG_RX_PW_P0, 	NRF24L01_REG_DEFAULT_VAL_RX_PW_P0);
+	writeRegister(NRF24L01_REG_RX_PW_P1, 	NRF24L01_REG_DEFAULT_VAL_RX_PW_P1);
+	writeRegister(NRF24L01_REG_RX_PW_P2, 	NRF24L01_REG_DEFAULT_VAL_RX_PW_P2);
+	writeRegister(NRF24L01_REG_RX_PW_P3, 	NRF24L01_REG_DEFAULT_VAL_RX_PW_P3);
+	writeRegister(NRF24L01_REG_RX_PW_P4, 	NRF24L01_REG_DEFAULT_VAL_RX_PW_P4);
+	writeRegister(NRF24L01_REG_RX_PW_P5, 	NRF24L01_REG_DEFAULT_VAL_RX_PW_P5);
+	writeRegister(NRF24L01_REG_FIFO_STATUS, NRF24L01_REG_DEFAULT_VAL_FIFO_STATUS);
+	writeRegister(NRF24L01_REG_DYNPD, 		NRF24L01_REG_DEFAULT_VAL_DYNPD);
+	writeRegister(NRF24L01_REG_FEATURE, 	NRF24L01_REG_DEFAULT_VAL_FEATURE);
 }
 
-uint8_t Nrf24L01::RxFifoEmpty(void) {
-	uint8_t reg = TM_NRF24L01_ReadRegister(NRF24L01_REG_FIFO_STATUS);
+uint8_t Nrf24L01::rxFifoEmpty(void) {
+	uint8_t reg = readRegister(NRF24L01_REG_FIFO_STATUS);
 	return NRF24L01_CHECK_BIT(reg, NRF24L01_RX_EMPTY);
 }
 
@@ -255,30 +255,30 @@ uint8_t Nrf24L01::init() {
 	SetChannel(_channel);
 
 	/* Set pipeline to max possible 32 bytes */
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RX_PW_P0, nrf_config.PayloadSize); // Auto-ACK pipe
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RX_PW_P1, nrf_config.PayloadSize); // Data payload pipe
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RX_PW_P2, nrf_config.PayloadSize);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RX_PW_P3, nrf_config.PayloadSize);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RX_PW_P4, nrf_config.PayloadSize);
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RX_PW_P5, nrf_config.PayloadSize);
+	writeRegister(NRF24L01_REG_RX_PW_P0, nrf_config.PayloadSize); // Auto-ACK pipe
+	writeRegister(NRF24L01_REG_RX_PW_P1, nrf_config.PayloadSize); // Data payload pipe
+	writeRegister(NRF24L01_REG_RX_PW_P2, nrf_config.PayloadSize);
+	writeRegister(NRF24L01_REG_RX_PW_P3, nrf_config.PayloadSize);
+	writeRegister(NRF24L01_REG_RX_PW_P4, nrf_config.PayloadSize);
+	writeRegister(NRF24L01_REG_RX_PW_P5, nrf_config.PayloadSize);
 
 	/* Set RF settings (2mbps, output power) */
 	SetRF(nrf_config.DataRate, nrf_config.OutPwr);
 
 	/* Config register */
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_CONFIG, NRF24L01_CONFIG);
+	writeRegister(NRF24L01_REG_CONFIG, NRF24L01_CONFIG);
 
 	/* Enable auto-acknowledgment for all pipes */
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_EN_AA, 0x3F);
+	writeRegister(NRF24L01_REG_EN_AA, 0x3F);
 
 	/* Enable RX addresses */
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_EN_RXADDR, 0x3F);
+	writeRegister(NRF24L01_REG_EN_RXADDR, 0x3F);
 
 	/* Auto retransmit delay: 1000 (4x250) us and Up to 15 retransmit trials */
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_SETUP_RETR, 0x4F);
+	writeRegister(NRF24L01_REG_SETUP_RETR, 0x4F);
 
 	/* Dynamic length configurations: No dynamic length */
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_DYNPD, (0 << NRF24L01_DPL_P0) | (0 << NRF24L01_DPL_P1) | (0 << NRF24L01_DPL_P2) | (0 << NRF24L01_DPL_P3) | (0 << NRF24L01_DPL_P4) | (0 << NRF24L01_DPL_P5));
+	writeRegister(NRF24L01_REG_DYNPD, (0 << NRF24L01_DPL_P0) | (0 << NRF24L01_DPL_P1) | (0 << NRF24L01_DPL_P2) | (0 << NRF24L01_DPL_P3) | (0 << NRF24L01_DPL_P4) | (0 << NRF24L01_DPL_P5));
 
 	/* Clear FIFOs */
 	NRF24L01_FLUSH_TX(_spi->Instance, _cs_port, _cs_pin);
@@ -297,14 +297,14 @@ uint8_t Nrf24L01::init() {
 void Nrf24L01::SetMyAddress(uint8_t *adr) {
 //	NRF24L01_CE_LOW;
 	PIN_LOW(_ce_port, _ce_pin);
-	TM_NRF24L01_WriteRegisterMulti(NRF24L01_REG_RX_ADDR_P1, adr, 5);
+	writeRegisterMulti(NRF24L01_REG_RX_ADDR_P1, adr, 5);
 //	NRF24L01_CE_HIGH;
 	PIN_HIGH(_ce_port, _ce_pin);
 }
 
 void Nrf24L01::SetTxAddress(uint8_t *adr) {
-	TM_NRF24L01_WriteRegisterMulti(NRF24L01_REG_RX_ADDR_P0, adr, 5);
-	TM_NRF24L01_WriteRegisterMulti(NRF24L01_REG_TX_ADDR, adr, 5);
+	writeRegisterMulti(NRF24L01_REG_RX_ADDR_P0, adr, 5);
+	writeRegisterMulti(NRF24L01_REG_TX_ADDR, adr, 5);
 }
 
 
@@ -339,12 +339,12 @@ Transmit_Status_t Nrf24L01::GetTransmissionStatus(void) {
 
 uint8_t Nrf24L01::GetRetransmissionsCount(void) {
 	/* Low 4 bits */
-	return TM_NRF24L01_ReadRegister(NRF24L01_REG_OBSERVE_TX) & 0x0F;
+	return readRegister(NRF24L01_REG_OBSERVE_TX) & 0x0F;
 }
 
 void Nrf24L01::PowerUpTx(void) {
 	Clear_Interrupts();
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_CONFIG, NRF24L01_CONFIG | (0 << NRF24L01_PRIM_RX) | (1 << NRF24L01_PWR_UP));
+	writeRegister(NRF24L01_REG_CONFIG, NRF24L01_CONFIG | (0 << NRF24L01_PRIM_RX) | (1 << NRF24L01_PWR_UP));
 }
 
 void Nrf24L01::SetChannel(uint8_t channel) {
@@ -352,11 +352,11 @@ void Nrf24L01::SetChannel(uint8_t channel) {
 		/* Store new channel setting */
 		nrf_config.Channel = channel;
 		/* Write channel */
-		TM_NRF24L01_WriteRegister(NRF24L01_REG_RF_CH, channel);
+		writeRegister(NRF24L01_REG_RF_CH, channel);
 	}
 }
 
-void Nrf24L01::SetRF(TM_NRF24L01_DataRate_t DataRate, TM_NRF24L01_OutputPower_t OutPwr) {
+void Nrf24L01::SetRF(NRF_DataRate_t DataRate, NRF_OutputPower_t OutPwr) {
 	uint8_t tmp = 0;
 	nrf_config.DataRate = DataRate;
 	nrf_config.OutPwr = OutPwr;
@@ -376,16 +376,16 @@ void Nrf24L01::SetRF(TM_NRF24L01_DataRate_t DataRate, TM_NRF24L01_OutputPower_t
 		tmp |= 1 << NRF24L01_RF_PWR;
 	}
 
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_RF_SETUP, tmp);
+	writeRegister(NRF24L01_REG_RF_SETUP, tmp);
 }
 
-uint8_t Nrf24L01::Read_Interrupts(TM_NRF24L01_IRQ_t* IRQ) {
+uint8_t Nrf24L01::Read_Interrupts(NRF_IRQ_t* IRQ) {
 	IRQ->Status = GetStatus();
 	return IRQ->Status;
 }
 
 void Nrf24L01::Clear_Interrupts(void) {
-	TM_NRF24L01_WriteRegister(0x07, 0x70);
+	writeRegister(0x07, 0x70);
 }
 
 void Nrf24L01::PowerUpRx(void) {
@@ -397,7 +397,7 @@ void Nrf24L01::PowerUpRx(void) {
 	/* Clear interrupts */
 	Clear_Interrupts();
 	/* Setup RX mode */
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_CONFIG, NRF24L01_CONFIG | 1 << NRF24L01_PWR_UP | 1 << NRF24L01_PRIM_RX);
+	writeRegister(NRF24L01_REG_CONFIG, NRF24L01_CONFIG | 1 << NRF24L01_PWR_UP | 1 << NRF24L01_PRIM_RX);
 	/* Start listening */
 //	NRF24L01_CE_HIGH;
 	PIN_HIGH(_ce_port, _ce_pin);
@@ -407,7 +407,7 @@ void Nrf24L01::PowerUpRx(void) {
 void Nrf24L01::PowerDown(void) {
 //	NRF24L01_CE_LOW;
 	PIN_LOW(_ce_port, _ce_pin);
-	TM_NRF24L01_WriteBit(NRF24L01_REG_CONFIG, NRF24L01_PWR_UP, 0);
+	writeBit(NRF24L01_REG_CONFIG, NRF24L01_PWR_UP, 0);
 }
 
 
@@ -454,7 +454,7 @@ void Nrf24L01::GetData(uint8_t* data) {
 	PIN_HIGH(_cs_port, _cs_pin);
 
 	/* Reset status register, clear RX_DR interrupt flag */
-	TM_NRF24L01_WriteRegister(NRF24L01_REG_STATUS, (1 << NRF24L01_RX_DR));
+	writeRegister(NRF24L01_REG_STATUS, (1 << NRF24L01_RX_DR));
 }
 
 uint8_t Nrf24L01::DataReady(void) {
@@ -463,6 +463,6 @@ uint8_t Nrf24L01::DataReady(void) {
 	if (NRF24L01_CHECK_BIT(status, NRF24L01_RX_DR)) {
 		return 1;
 	}
-	return !RxFifoEmpty();
+	return !rxFifoEmpty();
 }
 

src/nrf24l01.h

@@ -47,15 +47,15 @@
  * \par Default pinout
  * 	
 \verbatim
-NRF24L01+	STM32Fxxx	DESCRIPTION
-GND			GND			Ground
-VCC			3.3V		3.3V
-CE			PD8			RF activated pin
-CSN			PD7			Chip select pin for SPI
-SCK			PC10		SCK pin for SPI
-MOSI		PC12		MOSI pin for SPI
-MISO		PC11		MISO pin for SPI
-IRQ			Not used	Interrupt pin. Goes low when active. Pin functionality is active, but not used in library
+NRF24L01+	DESCRIPTION
+GND			Ground
+VCC			3.3V
+CE			RF activated pin
+CSN			Chip select pin for SPI
+SCK			SCK pin for SPI
+MOSI		MOSI pin for SPI
+MISO		MISO pin for SPI
+IRQ			Not used.	Interrupt pin. Goes low when active. Pin functionality is active, but not used in library
 \endverbatim 
  *
  * IRQ pin is not used in this library, but its functionality is enabled by this software.
@@ -120,9 +120,9 @@ public:
     uint8_t DataReady(void);
     void GetData(uint8_t *data);
     void SetChannel(uint8_t channel);
-    void SetRF(TM_NRF24L01_DataRate_t DataRate, TM_NRF24L01_OutputPower_t OutPwr);
+    void SetRF(NRF_DataRate_t DataRate, NRF_OutputPower_t OutPwr);
     uint8_t GetStatus(void);
-    uint8_t Read_Interrupts(TM_NRF24L01_IRQ_t* IRQ);
+    uint8_t Read_Interrupts(NRF_IRQ_t* IRQ);
     void Clear_Interrupts(void);
 
 private:
@@ -130,13 +130,13 @@ private:
     void initPins(void);
     void softwareReset(void);
 
-    void TM_NRF24L01_WriteRegister(uint8_t reg, uint8_t value);
-    void TM_NRF24L01_WriteBit(uint8_t reg, uint8_t bit, uint8_t value);
-    uint8_t TM_NRF24L01_ReadBit(uint8_t reg, uint8_t bit);
-    uint8_t TM_NRF24L01_ReadRegister(uint8_t reg);
-    void TM_NRF24L01_ReadRegisterMulti(uint8_t reg, uint8_t* data, uint8_t count);
-    void TM_NRF24L01_WriteRegisterMulti(uint8_t reg, uint8_t *data, uint8_t count);
-    uint8_t RxFifoEmpty(void);
+    void writeRegister(uint8_t reg, uint8_t value);
+    void writeBit(uint8_t reg, uint8_t bit, uint8_t value);
+    uint8_t readBit(uint8_t reg, uint8_t bit);
+    uint8_t readRegister(uint8_t reg);
+    void readRegisterMulti(uint8_t reg, uint8_t* data, uint8_t count);
+    void writeRegisterMulti(uint8_t reg, uint8_t *data, uint8_t count);
+    uint8_t rxFifoEmpty(void);
 };
 
 

src/nrf24l01_defines.h

@@ -194,7 +194,7 @@ typedef union _TM_NRF24L01_IRQ_t {
 		uint8_t reserved1:1;
 	} F;
 	uint8_t Status;          /*!< NRF status register value */
-} TM_NRF24L01_IRQ_t;
+} NRF_IRQ_t;
 
 
 
@@ -214,7 +214,7 @@ typedef enum _TM_NRF24L01_DataRate_t {
 	TM_NRF24L01_DataRate_2M = 0x00, /*!< Data rate set to 2Mbps */
 	TM_NRF24L01_DataRate_1M,        /*!< Data rate set to 1Mbps */
 	TM_NRF24L01_DataRate_250k       /*!< Data rate set to 250kbps */
-} TM_NRF24L01_DataRate_t;
+} NRF_DataRate_t;
 
 /**
  * @brief  Output power enumeration
@@ -224,14 +224,14 @@ typedef enum _TM_NRF24L01_OutputPower_t {
 	TM_NRF24L01_OutputPower_M12dBm,       /*!< Output power set to -12dBm */
 	TM_NRF24L01_OutputPower_M6dBm,        /*!< Output power set to -6dBm */
 	TM_NRF24L01_OutputPower_0dBm          /*!< Output power set to 0dBm */
-} TM_NRF24L01_OutputPower_t;
+} NRF_OutputPower_t;
 
 
 typedef struct {
 	uint8_t PayloadSize;				//Payload size
 	uint8_t Channel;					//Channel selected
-	TM_NRF24L01_OutputPower_t OutPwr;	//Output power
-	TM_NRF24L01_DataRate_t DataRate;	//Data rate
+	NRF_OutputPower_t OutPwr;	//Output power
+	NRF_DataRate_t DataRate;	//Data rate
 } NRF24L01_Conig_t;