add UART FIFO buffer based on DMA circular buffer

Core/Inc/main.h

@@ -51,7 +51,7 @@ typedef enum {
 
 /* Exported macro ------------------------------------------------------------*/
 /* USER CODE BEGIN EM */
-
+#define FIFO_DEPTH 8
 /* USER CODE END EM */
 
 /* Exported functions prototypes ---------------------------------------------*/

Core/Src/app_imu_dmp.cpp

@@ -13,7 +13,7 @@
 DMP_ICM20948 _imuDmpInstance;
 DMP_ICM20948Settings _imuDmpSettings = {
   .mode = 1,                            	// 0 = low power mode, 1 = high performance mode
-  .enable_gyroscope = true,             	// Enables gyroscope output
+  .enable_gyroscope = true,             	// Enables gyroscope output	(true)
   .enable_accelerometer = true,         	// Enables accelerometer output
   .enable_magnetometer = false,         	// Enables magnetometer output // Enables quaternion output
   .enable_gravity = false,              	// Enables gravity vector output

Core/Src/main.c

@@ -88,11 +88,22 @@ static void MX_USART1_UART_Init(void);
 
 /* Private user code ---------------------------------------------------------*/
 /* USER CODE BEGIN 0 */
+
+typedef struct {
+    uint8_t payload[PAYLOAD_SIZE];
+    uint8_t length;
+} rx_packet_t;
+
 #define MAX_SYSTICK  0xFFFFFFFF
 
 uint8_t rx_ring_buffer[BUFF_SIZE];
 uint8_t *dataUART;  // pointee for rx_buffer
 
+rx_packet_t packet_fifo[FIFO_DEPTH];
+volatile uint8_t fifo_head = 0;  // index pre zápis (z UARTu)
+volatile uint8_t fifo_tail = 0;  // index pre čítanie (do nBus)
+volatile uint8_t fifo_count = 0; // počet nespracovaných paketov vo FIFO
+
 // UART DMA related variables
 volatile uint32_t uart_timeout = MAX_SYSTICK;
 volatile uint16_t rx_read_pos = 0; // DAM UART CIRCULAR - tail
@@ -140,53 +151,61 @@ inline void app_delay(uint8_t ms){
 	HAL_Delay(ms);
 }
 
-
 static uint8_t Parse_Protocol_Byte(uint8_t b) {
-
-	uint8_t packet_finished = 0;
-	// Timeout reset logic
-	if (state != STATE_WAIT_LEN) {
-		if ((HAL_GetTick() - uart_timeout) > NBUS_UART_FRAME_TIMEOUT){
-			state = STATE_WAIT_LEN;
-			msg_len = 0;
-			msg_idx = 0;
-		}
-	}
+    uint8_t packet_finished = 0;
+
+    // Timeout reset logic
+    if (state != STATE_WAIT_LEN) {
+        if ((HAL_GetTick() - uart_timeout) > NBUS_UART_FRAME_TIMEOUT){
+            state = STATE_WAIT_LEN;
+            msg_len = 0;
+            msg_idx = 0;
+        }
+    }
 
     switch (state) {
         case STATE_WAIT_LEN:
-            // Validácia dĺžky (max 128 bajtov, min 4 bajty)
+            // Validácia dĺžky
             if (b > 3 && b < PAYLOAD_SIZE) {
                 msg_len = b;
                 msg_idx = 0;
                 state = STATE_PAYLOAD;
-                uart_timeout = HAL_GetTick(); // Reset timeoutu
+                uart_timeout = HAL_GetTick();
+
             }
             break;
 
-
         case STATE_PAYLOAD:
-        	dataUART[msg_idx++] = b;
-        	uart_timeout = HAL_GetTick(); // Aktualizácia timeoutu pri každom bajte
+            // Zapisujeme do hlavy FIFO namiesto priamo do dataUART
+            packet_fifo[fifo_head].payload[msg_idx++] = b;
+            uart_timeout = HAL_GetTick();
+            //led_toggle();
+            //HAL_GPIO_TogglePin(SPI_SS_GPIO_Port, SPI_SS_Pin);
+            if (msg_idx >= msg_len) { // Koniec paketu
+                packet_fifo[fifo_head].length = msg_len;
+
+
+                // Posunieme hlavu FIFO, ak máme miesto
+                if (fifo_count < FIFO_DEPTH) {
+                    fifo_head = (fifo_head + 1) % FIFO_DEPTH;
+                    fifo_count++;
+                } else {
+                    // FIFO je plné - tu by sa dal riešiť error handling
+                    // (momentálne sa nový paket zahodí, resp. prepíše aktuálny head)
+                }
 
-            if (msg_idx >= msg_len) { // Koniec paketu (podľa definície dĺžky)
-            	nbus_cb_UART_RX(msg_idx);	// callback to nBus, notify message length
                 state = STATE_WAIT_LEN;
                 packet_finished = 1;
             }
             break;
     }
-
     return packet_finished;
-
-
 }
 
 static void Process_UART_RingBuffer(void) {
-	// Zistíme, kde sa aktuálne nachádza DMA (Head)
-    // CNDTR register obsahuje počet ZOSTÁVAJÚCICH bajtov do konca buffra
     uint16_t rx_dma_pos = BUFF_SIZE - __HAL_DMA_GET_COUNTER(huart1.hdmarx);
 
+    // Spracuj všetky dostupné bajty z DMA a nalož pakety do FIFO
     while (rx_read_pos != rx_dma_pos) {
         uint8_t byte = rx_ring_buffer[rx_read_pos];
         rx_read_pos++;
@@ -194,10 +213,26 @@ static void Process_UART_RingBuffer(void) {
             rx_read_pos = 0;
         }
 
-        if( Parse_Protocol_Byte(byte) != 0){
-        	return;
-        }
+        // Funkcia už automaticky rieši zápis do FIFO
+        Parse_Protocol_Byte(byte);
+    }
+}
+
+
+uint8_t nbus_fifo_pull(uint8_t *dest_buffer, uint8_t *out_len) {
+
+    if (fifo_count == 0) {
+        return 0; // FIFO je prázdne
     }
+    // Prekopírujeme dáta a dĺžku
+    *out_len = packet_fifo[fifo_tail].length;
+    memcpy(dest_buffer, packet_fifo[fifo_tail].payload, *out_len);
+
+    // Posunieme tail a znížime počítadlo nespracovaných paketov
+    fifo_tail = (fifo_tail + 1) % FIFO_DEPTH;
+    fifo_count--;
+
+    return 1;
 }
 
 static inline uint8_t loop_callback(nBusStateCallbackType_t state_check) {
@@ -206,11 +241,10 @@ static inline uint8_t loop_callback(nBusStateCallbackType_t state_check) {
 #if MODULE == MODULE_IMU || MODULE == MODULE_DMP
 		if(icm_data_ready == 1){
 			icm_data_ready = 0;
-			return 0;  // TODO!!!!!!  TEMPORARY DISABLED STATE. interrupt from external sensor: data ready
+			return 1;  // TEMPORARY ALWAYS ENABLE STATE. interrupt from external sensor: data ready
 		}
 #endif
-
-		return 0;
+	return 0;
 	}
 
 	if (state_check == CallbackType_UART) {
@@ -293,6 +327,7 @@ int main(void)
 		  led_toggle,
 		  app_delay,
 		  loop_callback,
+		  nbus_fifo_pull,
   };
 
 #if MODULE_MASTER == 1
@@ -345,7 +380,6 @@ int main(void)
 
   memory_ec20.init(ONE_WIRE_GPIO_Port, ONE_WIRE_Pin);
   nbus_init_memory_driver(&memory_ec20);
-
   nbus_stack();
 
   /* USER CODE END 2 */

Modules/nbus

@@ -1 +1 @@
-Subproject commit 61b9ad932d04e24942a86b8378a7baae95e3dd03
+Subproject commit 1b21f45e6e6c5c1cbb101c4a0ff405600f451ad5