stm32l0xx_hal_adc.c 94 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l0xx_hal_adc.c
  4. * @author MCD Application Team
  5. * @brief This file provides firmware functions to manage the following
  6. * functionalities of the Analog to Digital Convertor (ADC)
  7. * peripheral:
  8. * + Peripheral Control functions
  9. * + Peripheral State functions
  10. * Other functions (extended functions) are available in file
  11. * "stm32l0xx_hal_adc_ex.c".
  12. *
  13. ******************************************************************************
  14. * @attention
  15. *
  16. * Copyright (c) 2016 STMicroelectronics.
  17. * All rights reserved.
  18. *
  19. * This software is licensed under terms that can be found in the LICENSE file
  20. * in the root directory of this software component.
  21. * If no LICENSE file comes with this software, it is provided AS-IS.
  22. *
  23. ******************************************************************************
  24. @verbatim
  25. ==============================================================================
  26. ##### ADC peripheral features #####
  27. ==============================================================================
  28. [..]
  29. (+) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution.
  30. (+) Interrupt generation at the end of regular conversion and in case of
  31. analog watchdog or overrun events.
  32. (+) Single and continuous conversion modes.
  33. (+) Scan mode for conversion of several channels sequentially.
  34. (+) Data alignment with in-built data coherency.
  35. (+) Programmable sampling time (common for all channels)
  36. (+) External trigger (timer or EXTI) with configurable polarity
  37. (+) DMA request generation for transfer of conversions data of regular group.
  38. (+) ADC calibration
  39. (+) ADC conversion of regular group.
  40. (+) ADC supply requirements: 1.62 V to 3.6 V.
  41. (+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to
  42. Vdda or to an external voltage reference).
  43. ##### How to use this driver #####
  44. ==============================================================================
  45. [..]
  46. *** Configuration of top level parameters related to ADC ***
  47. ============================================================
  48. [..]
  49. (#) Enable the ADC interface
  50. (++) As prerequisite, ADC clock must be configured at RCC top level.
  51. Caution: On STM32L0, ADC clock frequency max is 16MHz (refer
  52. to device datasheet).
  53. Therefore, ADC clock prescaler must be configured in
  54. function of ADC clock source frequency to remain below
  55. this maximum frequency.
  56. (++) Two clock settings are mandatory:
  57. (+++) ADC clock (core clock, also possibly conversion clock).
  58. (+++) ADC clock (conversions clock).
  59. Two possible clock sources: synchronous clock derived from APB clock
  60. or asynchronous clock derived from ADC dedicated HSI RC oscillator
  61. 16MHz.
  62. If asynchronous clock is selected, parameter "HSIState" must be set either:
  63. - to "...HSIState = RCC_HSI_ON" to maintain the HSI16 oscillator
  64. always enabled: can be used to supply the main system clock.
  65. (+++) Example:
  66. Into HAL_ADC_MspInit() (recommended code location) or with
  67. other device clock parameters configuration:
  68. (+++) __HAL_RCC_ADC1_CLK_ENABLE(); (mandatory)
  69. HSI enable (optional: if asynchronous clock selected)
  70. (+++) RCC_OscInitTypeDef RCC_OscInitStructure;
  71. (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI;
  72. (+++) RCC_OscInitStructure.HSI16CalibrationValue = RCC_HSICALIBRATION_DEFAULT;
  73. (+++) RCC_OscInitStructure.HSIState = RCC_HSI_ON;
  74. (+++) RCC_OscInitStructure.PLL... (optional if used for system clock)
  75. (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
  76. (++) ADC clock source and clock prescaler are configured at ADC level with
  77. parameter "ClockPrescaler" using function HAL_ADC_Init().
  78. (#) ADC pins configuration
  79. (++) Enable the clock for the ADC GPIOs
  80. using macro __HAL_RCC_GPIOx_CLK_ENABLE()
  81. (++) Configure these ADC pins in analog mode
  82. using function HAL_GPIO_Init()
  83. (#) Optionally, in case of usage of ADC with interruptions:
  84. (++) Configure the NVIC for ADC
  85. using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
  86. (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
  87. into the function of corresponding ADC interruption vector
  88. ADCx_IRQHandler().
  89. (#) Optionally, in case of usage of DMA:
  90. (++) Configure the DMA (DMA channel, mode normal or circular, ...)
  91. using function HAL_DMA_Init().
  92. (++) Configure the NVIC for DMA
  93. using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
  94. (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
  95. into the function of corresponding DMA interruption vector
  96. DMAx_Channelx_IRQHandler().
  97. *** Configuration of ADC, group regular, channels parameters ***
  98. ================================================================
  99. [..]
  100. (#) Configure the ADC parameters (resolution, data alignment, ...)
  101. and regular group parameters (conversion trigger, sequencer, ...)
  102. using function HAL_ADC_Init().
  103. (#) Configure the channels for regular group parameters (channel number,
  104. channel rank into sequencer, ..., into regular group)
  105. using function HAL_ADC_ConfigChannel().
  106. (#) Optionally, configure the analog watchdog parameters (channels
  107. monitored, thresholds, ...)
  108. using function HAL_ADC_AnalogWDGConfig().
  109. (#) When device is in mode low-power (low-power run, low-power sleep or stop mode),
  110. function "HAL_ADCEx_EnableVREFINT()" must be called before function HAL_ADC_Init().
  111. In case of internal temperature sensor to be measured:
  112. function "HAL_ADCEx_EnableVREFINTTempSensor()" must be called similarilly
  113. *** Execution of ADC conversions ***
  114. ====================================
  115. [..]
  116. (#) Optionally, perform an automatic ADC calibration to improve the
  117. conversion accuracy
  118. using function HAL_ADCEx_Calibration_Start().
  119. (#) ADC driver can be used among three modes: polling, interruption,
  120. transfer by DMA.
  121. (++) ADC conversion by polling:
  122. (+++) Activate the ADC peripheral and start conversions
  123. using function HAL_ADC_Start()
  124. (+++) Wait for ADC conversion completion
  125. using function HAL_ADC_PollForConversion()
  126. (+++) Retrieve conversion results
  127. using function HAL_ADC_GetValue()
  128. (+++) Stop conversion and disable the ADC peripheral
  129. using function HAL_ADC_Stop()
  130. (++) ADC conversion by interruption:
  131. (+++) Activate the ADC peripheral and start conversions
  132. using function HAL_ADC_Start_IT()
  133. (+++) Wait for ADC conversion completion by call of function
  134. HAL_ADC_ConvCpltCallback()
  135. (this function must be implemented in user program)
  136. (+++) Retrieve conversion results
  137. using function HAL_ADC_GetValue()
  138. (+++) Stop conversion and disable the ADC peripheral
  139. using function HAL_ADC_Stop_IT()
  140. (++) ADC conversion with transfer by DMA:
  141. (+++) Activate the ADC peripheral and start conversions
  142. using function HAL_ADC_Start_DMA()
  143. (+++) Wait for ADC conversion completion by call of function
  144. HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()
  145. (these functions must be implemented in user program)
  146. (+++) Conversion results are automatically transferred by DMA into
  147. destination variable address.
  148. (+++) Stop conversion and disable the ADC peripheral
  149. using function HAL_ADC_Stop_DMA()
  150. [..]
  151. (@) Callback functions must be implemented in user program:
  152. (+@) HAL_ADC_ErrorCallback()
  153. (+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog)
  154. (+@) HAL_ADC_ConvCpltCallback()
  155. (+@) HAL_ADC_ConvHalfCpltCallback
  156. *** Deinitialization of ADC ***
  157. ============================================================
  158. [..]
  159. (#) Disable the ADC interface
  160. (++) ADC clock can be hard reset and disabled at RCC top level.
  161. (++) Hard reset of ADC peripherals
  162. using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET().
  163. (++) ADC clock disable
  164. using the equivalent macro/functions as configuration step.
  165. (+++) Example:
  166. Into HAL_ADC_MspDeInit() (recommended code location) or with
  167. other device clock parameters configuration:
  168. (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI;
  169. (+++) RCC_OscInitStructure.HSIState = RCC_HSI_OFF; (if not used for system clock)
  170. (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
  171. (#) ADC pins configuration
  172. (++) Disable the clock for the ADC GPIOs
  173. using macro __HAL_RCC_GPIOx_CLK_DISABLE()
  174. (#) Optionally, in case of usage of ADC with interruptions:
  175. (++) Disable the NVIC for ADC
  176. using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
  177. (#) Optionally, in case of usage of DMA:
  178. (++) Deinitialize the DMA
  179. using function HAL_DMA_Init().
  180. (++) Disable the NVIC for DMA
  181. using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
  182. [..]
  183. *** Callback registration ***
  184. =============================================
  185. [..]
  186. The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1,
  187. allows the user to configure dynamically the driver callbacks.
  188. Use Functions HAL_ADC_RegisterCallback()
  189. to register an interrupt callback.
  190. [..]
  191. Function HAL_ADC_RegisterCallback() allows to register following callbacks:
  192. (+) ConvCpltCallback : ADC conversion complete callback
  193. (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback
  194. (+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback
  195. (+) ErrorCallback : ADC error callback
  196. (+) MspInitCallback : ADC Msp Init callback
  197. (+) MspDeInitCallback : ADC Msp DeInit callback
  198. This function takes as parameters the HAL peripheral handle, the Callback ID
  199. and a pointer to the user callback function.
  200. [..]
  201. Use function HAL_ADC_UnRegisterCallback to reset a callback to the default
  202. weak function.
  203. [..]
  204. HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle,
  205. and the Callback ID.
  206. This function allows to reset following callbacks:
  207. (+) ConvCpltCallback : ADC conversion complete callback
  208. (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback
  209. (+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback
  210. (+) ErrorCallback : ADC error callback
  211. (+) MspInitCallback : ADC Msp Init callback
  212. (+) MspDeInitCallback : ADC Msp DeInit callback
  213. [..]
  214. By default, after the HAL_ADC_Init() and when the state is HAL_ADC_STATE_RESET
  215. all callbacks are set to the corresponding weak functions:
  216. examples HAL_ADC_ConvCpltCallback(), HAL_ADC_ErrorCallback().
  217. Exception done for MspInit and MspDeInit functions that are
  218. reset to the legacy weak functions in the HAL_ADC_Init()/ HAL_ADC_DeInit() only when
  219. these callbacks are null (not registered beforehand).
  220. [..]
  221. If MspInit or MspDeInit are not null, the HAL_ADC_Init()/ HAL_ADC_DeInit()
  222. keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
  223. [..]
  224. Callbacks can be registered/unregistered in HAL_ADC_STATE_READY state only.
  225. Exception done MspInit/MspDeInit functions that can be registered/unregistered
  226. in HAL_ADC_STATE_READY or HAL_ADC_STATE_RESET state,
  227. thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
  228. [..]
  229. Then, the user first registers the MspInit/MspDeInit user callbacks
  230. using HAL_ADC_RegisterCallback() before calling HAL_ADC_DeInit()
  231. or HAL_ADC_Init() function.
  232. [..]
  233. When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or
  234. not defined, the callback registration feature is not available and all callbacks
  235. are set to the corresponding weak functions.
  236. @endverbatim
  237. ******************************************************************************
  238. */
  239. /* Includes ------------------------------------------------------------------*/
  240. #include "stm32l0xx_hal.h"
  241. /** @addtogroup STM32L0xx_HAL_Driver
  242. * @{
  243. */
  244. /** @defgroup ADC ADC
  245. * @brief ADC HAL module driver
  246. * @{
  247. */
  248. #ifdef HAL_ADC_MODULE_ENABLED
  249. /* Private typedef -----------------------------------------------------------*/
  250. /* Private define ------------------------------------------------------------*/
  251. /** @defgroup ADC_Private_Constants ADC Private Constants
  252. * @{
  253. */
  254. /* Delay for ADC stabilization time. */
  255. /* Maximum delay is 1us (refer to device datasheet, parameter tSTART). */
  256. /* Unit: us */
  257. #define ADC_STAB_DELAY_US (1U)
  258. /* Delay for temperature sensor stabilization time. */
  259. /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
  260. /* Unit: us */
  261. #define ADC_TEMPSENSOR_DELAY_US (10U)
  262. /**
  263. * @}
  264. */
  265. /* Private macro -------------------------------------------------------------*/
  266. /* Private variables ---------------------------------------------------------*/
  267. /* Private function prototypes -----------------------------------------------*/
  268. /** @defgroup ADC_Private_Functions ADC Private Functions
  269. * @{
  270. */
  271. static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef *hadc);
  272. static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef *hadc);
  273. static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef *hadc);
  274. static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
  275. static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
  276. static void ADC_DMAError(DMA_HandleTypeDef *hdma);
  277. static void ADC_DelayMicroSecond(uint32_t microSecond);
  278. /**
  279. * @}
  280. */
  281. /* Exported functions ---------------------------------------------------------*/
  282. /** @defgroup ADC_Exported_Functions ADC Exported Functions
  283. * @{
  284. */
  285. /** @defgroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions
  286. * @brief ADC Initialization and Configuration functions
  287. *
  288. @verbatim
  289. ===============================================================================
  290. ##### Initialization and de-initialization functions #####
  291. ===============================================================================
  292. [..] This section provides functions allowing to:
  293. (+) Initialize and configure the ADC.
  294. (+) De-initialize the ADC.
  295. @endverbatim
  296. * @{
  297. */
  298. /**
  299. * @brief Initialize the ADC peripheral and regular group according to
  300. * parameters specified in structure "ADC_InitTypeDef".
  301. * @note As prerequisite, ADC clock must be configured at RCC top level
  302. * depending on possible clock sources: APB clock of HSI clock.
  303. * See commented example code below that can be copied and uncommented
  304. * into HAL_ADC_MspInit().
  305. * @note Possibility to update parameters on the fly:
  306. * This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
  307. * coming from ADC state reset. Following calls to this function can
  308. * be used to reconfigure some parameters of ADC_InitTypeDef
  309. * structure on the fly, without modifying MSP configuration. If ADC
  310. * MSP has to be modified again, HAL_ADC_DeInit() must be called
  311. * before HAL_ADC_Init().
  312. * The setting of these parameters is conditioned to ADC state.
  313. * For parameters constraints, see comments of structure
  314. * "ADC_InitTypeDef".
  315. * @note This function configures the ADC within 2 scopes: scope of entire
  316. * ADC and scope of regular group. For parameters details, see comments
  317. * of structure "ADC_InitTypeDef".
  318. * @note When device is in mode low-power (low-power run, low-power sleep or stop mode),
  319. * function "HAL_ADCEx_EnableVREFINT()" must be called before function HAL_ADC_Init()
  320. * (in case of previous ADC operations: function HAL_ADC_DeInit() must be called first).
  321. * In case of internal temperature sensor to be measured:
  322. * function "HAL_ADCEx_EnableVREFINTTempSensor()" must be called similarilly.
  323. * @param hadc ADC handle
  324. * @retval HAL status
  325. */
  326. HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef *hadc)
  327. {
  328. /* Check ADC handle */
  329. if (hadc == NULL)
  330. {
  331. return HAL_ERROR;
  332. }
  333. /* Check the parameters */
  334. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  335. assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
  336. assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
  337. assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
  338. assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
  339. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
  340. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
  341. assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
  342. assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
  343. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
  344. assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
  345. assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun));
  346. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait));
  347. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerFrequencyMode));
  348. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff));
  349. assert_param(IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTime));
  350. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.OversamplingMode));
  351. /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */
  352. /* at RCC top level depending on both possible clock sources: */
  353. /* APB clock or HSI clock. */
  354. /* Refer to header of this file for more details on clock enabling procedure*/
  355. /* Actions performed only if ADC is coming from state reset: */
  356. /* - Initialization of ADC MSP */
  357. /* - ADC voltage regulator enable */
  358. if (hadc->State == HAL_ADC_STATE_RESET)
  359. {
  360. /* Initialize ADC error code */
  361. ADC_CLEAR_ERRORCODE(hadc);
  362. /* Allocate lock resource and initialize it */
  363. hadc->Lock = HAL_UNLOCKED;
  364. #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
  365. /* Init the ADC Callback settings */
  366. hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; /* Legacy weak callback */
  367. hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; /* Legacy weak callback */
  368. hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; /* Legacy weak callback */
  369. hadc->ErrorCallback = HAL_ADC_ErrorCallback; /* Legacy weak callback */
  370. if (hadc->MspInitCallback == NULL)
  371. {
  372. hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
  373. }
  374. /* Init the low level hardware */
  375. hadc->MspInitCallback(hadc);
  376. #else
  377. /* Init the low level hardware */
  378. HAL_ADC_MspInit(hadc);
  379. #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
  380. }
  381. /* Configuration of ADC parameters if previous preliminary actions are */
  382. /* correctly completed. */
  383. /* and if there is no conversion on going on regular group (ADC can be */
  384. /* enabled anyway, in case of call of this function to update a parameter */
  385. /* on the fly). */
  386. if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) ||
  387. (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) != RESET))
  388. {
  389. /* Update ADC state machine to error */
  390. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
  391. /* Process unlocked */
  392. __HAL_UNLOCK(hadc);
  393. return HAL_ERROR;
  394. }
  395. /* Set ADC state */
  396. ADC_STATE_CLR_SET(hadc->State,
  397. HAL_ADC_STATE_REG_BUSY,
  398. HAL_ADC_STATE_BUSY_INTERNAL);
  399. /* Parameters update conditioned to ADC state: */
  400. /* Parameters that can be updated only when ADC is disabled: */
  401. /* - ADC clock mode */
  402. /* - ADC clock prescaler */
  403. /* - ADC Resolution */
  404. if (ADC_IS_ENABLE(hadc) == RESET)
  405. {
  406. /* Some parameters of this register are not reset, since they are set */
  407. /* by other functions and must be kept in case of usage of this */
  408. /* function on the fly (update of a parameter of ADC_InitTypeDef */
  409. /* without needing to reconfigure all other ADC groups/channels */
  410. /* parameters): */
  411. /* - internal measurement paths: Vbat, temperature sensor, Vref */
  412. /* (set into HAL_ADC_ConfigChannel() ) */
  413. /* Configuration of ADC clock: clock source PCLK or asynchronous with
  414. selectable prescaler */
  415. __HAL_ADC_CLOCK_PRESCALER(hadc);
  416. /* Configuration of ADC: */
  417. /* - Resolution */
  418. hadc->Instance->CFGR1 &= ~(ADC_CFGR1_RES);
  419. hadc->Instance->CFGR1 |= hadc->Init.Resolution;
  420. }
  421. /* Set the Low Frequency mode */
  422. ADC->CCR &= (uint32_t)~ADC_CCR_LFMEN;
  423. ADC->CCR |= __HAL_ADC_CCR_LOWFREQUENCY(hadc->Init.LowPowerFrequencyMode);
  424. /* Enable voltage regulator (if disabled at this step) */
  425. if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN))
  426. {
  427. /* Set ADVREGEN bit */
  428. hadc->Instance->CR |= ADC_CR_ADVREGEN;
  429. }
  430. /* Configuration of ADC: */
  431. /* - Resolution */
  432. /* - Data alignment */
  433. /* - Scan direction */
  434. /* - External trigger to start conversion */
  435. /* - External trigger polarity */
  436. /* - Continuous conversion mode */
  437. /* - DMA continuous request */
  438. /* - Overrun */
  439. /* - AutoDelay feature */
  440. /* - Discontinuous mode */
  441. hadc->Instance->CFGR1 &= ~(ADC_CFGR1_ALIGN |
  442. ADC_CFGR1_SCANDIR |
  443. ADC_CFGR1_EXTSEL |
  444. ADC_CFGR1_EXTEN |
  445. ADC_CFGR1_CONT |
  446. ADC_CFGR1_DMACFG |
  447. ADC_CFGR1_OVRMOD |
  448. ADC_CFGR1_AUTDLY |
  449. ADC_CFGR1_AUTOFF |
  450. ADC_CFGR1_DISCEN);
  451. hadc->Instance->CFGR1 |= (hadc->Init.DataAlign |
  452. ADC_SCANDIR(hadc->Init.ScanConvMode) |
  453. ADC_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) |
  454. ADC_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) |
  455. hadc->Init.Overrun |
  456. __HAL_ADC_CFGR1_AutoDelay(hadc->Init.LowPowerAutoWait) |
  457. __HAL_ADC_CFGR1_AUTOFF(hadc->Init.LowPowerAutoPowerOff));
  458. /* Enable external trigger if trigger selection is different of software */
  459. /* start. */
  460. /* Note: This configuration keeps the hardware feature of parameter */
  461. /* ExternalTrigConvEdge "trigger edge none" equivalent to */
  462. /* software start. */
  463. if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
  464. {
  465. hadc->Instance->CFGR1 |= hadc->Init.ExternalTrigConv |
  466. hadc->Init.ExternalTrigConvEdge;
  467. }
  468. /* Enable discontinuous mode only if continuous mode is disabled */
  469. if (hadc->Init.DiscontinuousConvMode == ENABLE)
  470. {
  471. if (hadc->Init.ContinuousConvMode == DISABLE)
  472. {
  473. /* Enable the selected ADC group regular discontinuous mode */
  474. hadc->Instance->CFGR1 |= (ADC_CFGR1_DISCEN);
  475. }
  476. else
  477. {
  478. /* ADC regular group discontinuous was intended to be enabled, */
  479. /* but ADC regular group modes continuous and sequencer discontinuous */
  480. /* cannot be enabled simultaneously. */
  481. /* Update ADC state machine to error */
  482. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  483. /* Set ADC error code to ADC peripheral internal error */
  484. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  485. }
  486. }
  487. if (hadc->Init.OversamplingMode == ENABLE)
  488. {
  489. assert_param(IS_ADC_OVERSAMPLING_RATIO(hadc->Init.Oversample.Ratio));
  490. assert_param(IS_ADC_RIGHT_BIT_SHIFT(hadc->Init.Oversample.RightBitShift));
  491. assert_param(IS_ADC_TRIGGERED_OVERSAMPLING_MODE(hadc->Init.Oversample.TriggeredMode));
  492. /* Configuration of Oversampler: */
  493. /* - Oversampling Ratio */
  494. /* - Right bit shift */
  495. /* - Triggered mode */
  496. hadc->Instance->CFGR2 &= ~(ADC_CFGR2_OVSR |
  497. ADC_CFGR2_OVSS |
  498. ADC_CFGR2_TOVS);
  499. hadc->Instance->CFGR2 |= (hadc->Init.Oversample.Ratio |
  500. hadc->Init.Oversample.RightBitShift |
  501. hadc->Init.Oversample.TriggeredMode);
  502. /* Enable OverSampling mode */
  503. hadc->Instance->CFGR2 |= ADC_CFGR2_OVSE;
  504. }
  505. else
  506. {
  507. if (HAL_IS_BIT_SET(hadc->Instance->CFGR2, ADC_CFGR2_OVSE))
  508. {
  509. /* Disable OverSampling mode if needed */
  510. hadc->Instance->CFGR2 &= ~ADC_CFGR2_OVSE;
  511. }
  512. }
  513. /* Clear the old sampling time */
  514. hadc->Instance->SMPR &= (uint32_t)(~ADC_SMPR_SMPR);
  515. /* Set the new sample time */
  516. hadc->Instance->SMPR |= hadc->Init.SamplingTime;
  517. /* Clear ADC error code */
  518. ADC_CLEAR_ERRORCODE(hadc);
  519. /* Set the ADC state */
  520. ADC_STATE_CLR_SET(hadc->State,
  521. HAL_ADC_STATE_BUSY_INTERNAL,
  522. HAL_ADC_STATE_READY);
  523. /* Return function status */
  524. return HAL_OK;
  525. }
  526. /**
  527. * @brief Deinitialize the ADC peripheral registers to their default reset
  528. * values, with deinitialization of the ADC MSP.
  529. * @note For devices with several ADCs: reset of ADC common registers is done
  530. * only if all ADCs sharing the same common group are disabled.
  531. * If this is not the case, reset of these common parameters reset is
  532. * bypassed without error reporting: it can be the intended behavior in
  533. * case of reset of a single ADC while the other ADCs sharing the same
  534. * common group is still running.
  535. * @param hadc ADC handle
  536. * @retval HAL status
  537. */
  538. HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc)
  539. {
  540. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  541. /* Check ADC handle */
  542. if (hadc == NULL)
  543. {
  544. return HAL_ERROR;
  545. }
  546. /* Check the parameters */
  547. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  548. /* Set ADC state */
  549. SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);
  550. /* Stop potential conversion on going, on regular group */
  551. tmp_hal_status = ADC_ConversionStop(hadc);
  552. /* Disable ADC peripheral if conversions are effectively stopped */
  553. if (tmp_hal_status == HAL_OK)
  554. {
  555. /* Disable the ADC peripheral */
  556. tmp_hal_status = ADC_Disable(hadc);
  557. /* Check if ADC is effectively disabled */
  558. if (tmp_hal_status != HAL_ERROR)
  559. {
  560. /* Change ADC state */
  561. hadc->State = HAL_ADC_STATE_READY;
  562. }
  563. }
  564. /* Configuration of ADC parameters if previous preliminary actions are */
  565. /* correctly completed. */
  566. if (tmp_hal_status != HAL_ERROR)
  567. {
  568. /* ========== Reset ADC registers ========== */
  569. /* Reset register IER */
  570. __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD | ADC_IT_OVR | ADC_IT_EOCAL | ADC_IT_EOS | \
  571. ADC_IT_EOC | ADC_IT_RDY | ADC_IT_EOSMP));
  572. /* Reset register ISR */
  573. __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_EOCAL | ADC_FLAG_OVR | ADC_FLAG_EOS | \
  574. ADC_FLAG_EOC | ADC_FLAG_EOSMP | ADC_FLAG_RDY));
  575. /* Reset register CR */
  576. /* Disable voltage regulator */
  577. /* Note: Regulator disable useful for power saving */
  578. /* Reset ADVREGEN bit */
  579. hadc->Instance->CR &= ~ADC_CR_ADVREGEN;
  580. /* Bits ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode "read-set": no direct reset applicable */
  581. /* No action */
  582. /* Reset register CFGR1 */
  583. hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | \
  584. ADC_CFGR1_DISCEN | ADC_CFGR1_AUTOFF | ADC_CFGR1_AUTDLY | \
  585. ADC_CFGR1_CONT | ADC_CFGR1_OVRMOD | ADC_CFGR1_EXTEN | \
  586. ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES | \
  587. ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN);
  588. /* Reset register CFGR2 */
  589. hadc->Instance->CFGR2 &= ~(ADC_CFGR2_TOVS | ADC_CFGR2_OVSS | ADC_CFGR2_OVSR | \
  590. ADC_CFGR2_OVSE | ADC_CFGR2_CKMODE);
  591. /* Reset register SMPR */
  592. hadc->Instance->SMPR &= ~(ADC_SMPR_SMPR);
  593. /* Reset register TR */
  594. hadc->Instance->TR &= ~(ADC_TR_LT | ADC_TR_HT);
  595. /* Reset register CALFACT */
  596. hadc->Instance->CALFACT &= ~(ADC_CALFACT_CALFACT);
  597. /* Reset register DR */
  598. /* bits in access mode read only, no direct reset applicable*/
  599. /* Reset register CALFACT */
  600. hadc->Instance->CALFACT &= ~(ADC_CALFACT_CALFACT);
  601. /* ========== Hard reset ADC peripheral ========== */
  602. /* Performs a global reset of the entire ADC peripheral: ADC state is */
  603. /* forced to a similar state after device power-on. */
  604. /* If needed, copy-paste and uncomment the following reset code into */
  605. /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)": */
  606. /* */
  607. /* __HAL_RCC_ADC1_FORCE_RESET() */
  608. /* __HAL_RCC_ADC1_RELEASE_RESET() */
  609. #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
  610. if (hadc->MspDeInitCallback == NULL)
  611. {
  612. hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
  613. }
  614. /* DeInit the low level hardware */
  615. hadc->MspDeInitCallback(hadc);
  616. #else
  617. /* DeInit the low level hardware */
  618. HAL_ADC_MspDeInit(hadc);
  619. #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
  620. /* Set ADC error code to none */
  621. ADC_CLEAR_ERRORCODE(hadc);
  622. /* Set ADC state */
  623. hadc->State = HAL_ADC_STATE_RESET;
  624. }
  625. /* Process unlocked */
  626. __HAL_UNLOCK(hadc);
  627. /* Return function status */
  628. return tmp_hal_status;
  629. }
  630. /**
  631. * @brief Initialize the ADC MSP.
  632. * @param hadc ADC handle
  633. * @retval None
  634. */
  635. __weak void HAL_ADC_MspInit(ADC_HandleTypeDef *hadc)
  636. {
  637. /* Prevent unused argument(s) compilation warning */
  638. UNUSED(hadc);
  639. /* NOTE : This function should not be modified. When the callback is needed,
  640. function HAL_ADC_MspInit must be implemented in the user file.
  641. */
  642. }
  643. /**
  644. * @brief DeInitialize the ADC MSP.
  645. * @param hadc ADC handle
  646. * @retval None
  647. */
  648. __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef *hadc)
  649. {
  650. /* Prevent unused argument(s) compilation warning */
  651. UNUSED(hadc);
  652. /* NOTE : This function should not be modified. When the callback is needed,
  653. function HAL_ADC_MspDeInit must be implemented in the user file.
  654. */
  655. }
  656. #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
  657. /**
  658. * @brief Register a User ADC Callback
  659. * To be used instead of the weak predefined callback
  660. * @param hadc Pointer to a ADC_HandleTypeDef structure that contains
  661. * the configuration information for the specified ADC.
  662. * @param CallbackID ID of the callback to be registered
  663. * This parameter can be one of the following values:
  664. * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID
  665. * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID
  666. * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID
  667. * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID
  668. * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complete callback ID
  669. * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID
  670. * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID
  671. * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
  672. * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
  673. * @param pCallback pointer to the Callback function
  674. * @retval HAL status
  675. */
  676. HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID, pADC_CallbackTypeDef pCallback)
  677. {
  678. HAL_StatusTypeDef status = HAL_OK;
  679. if (pCallback == NULL)
  680. {
  681. /* Update the error code */
  682. hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
  683. return HAL_ERROR;
  684. }
  685. if ((hadc->State & HAL_ADC_STATE_READY) != 0)
  686. {
  687. switch (CallbackID)
  688. {
  689. case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
  690. hadc->ConvCpltCallback = pCallback;
  691. break;
  692. case HAL_ADC_CONVERSION_HALF_CB_ID :
  693. hadc->ConvHalfCpltCallback = pCallback;
  694. break;
  695. case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
  696. hadc->LevelOutOfWindowCallback = pCallback;
  697. break;
  698. case HAL_ADC_ERROR_CB_ID :
  699. hadc->ErrorCallback = pCallback;
  700. break;
  701. case HAL_ADC_MSPINIT_CB_ID :
  702. hadc->MspInitCallback = pCallback;
  703. break;
  704. case HAL_ADC_MSPDEINIT_CB_ID :
  705. hadc->MspDeInitCallback = pCallback;
  706. break;
  707. default :
  708. /* Update the error code */
  709. hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
  710. /* Return error status */
  711. status = HAL_ERROR;
  712. break;
  713. }
  714. }
  715. else if (HAL_ADC_STATE_RESET == hadc->State)
  716. {
  717. switch (CallbackID)
  718. {
  719. case HAL_ADC_MSPINIT_CB_ID :
  720. hadc->MspInitCallback = pCallback;
  721. break;
  722. case HAL_ADC_MSPDEINIT_CB_ID :
  723. hadc->MspDeInitCallback = pCallback;
  724. break;
  725. default :
  726. /* Update the error code */
  727. hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
  728. /* Return error status */
  729. status = HAL_ERROR;
  730. break;
  731. }
  732. }
  733. else
  734. {
  735. /* Update the error code */
  736. hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
  737. /* Return error status */
  738. status = HAL_ERROR;
  739. }
  740. return status;
  741. }
  742. /**
  743. * @brief Unregister a ADC Callback
  744. * ADC callback is redirected to the weak predefined callback
  745. * @param hadc Pointer to a ADC_HandleTypeDef structure that contains
  746. * the configuration information for the specified ADC.
  747. * @param CallbackID ID of the callback to be unregistered
  748. * This parameter can be one of the following values:
  749. * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID
  750. * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID
  751. * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID
  752. * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID
  753. * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complete callback ID
  754. * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID
  755. * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID
  756. * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
  757. * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
  758. * @retval HAL status
  759. */
  760. HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID)
  761. {
  762. HAL_StatusTypeDef status = HAL_OK;
  763. if ((hadc->State & HAL_ADC_STATE_READY) != 0)
  764. {
  765. switch (CallbackID)
  766. {
  767. case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
  768. hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback;
  769. break;
  770. case HAL_ADC_CONVERSION_HALF_CB_ID :
  771. hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback;
  772. break;
  773. case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
  774. hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback;
  775. break;
  776. case HAL_ADC_ERROR_CB_ID :
  777. hadc->ErrorCallback = HAL_ADC_ErrorCallback;
  778. break;
  779. case HAL_ADC_MSPINIT_CB_ID :
  780. hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
  781. break;
  782. case HAL_ADC_MSPDEINIT_CB_ID :
  783. hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
  784. break;
  785. default :
  786. /* Update the error code */
  787. hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
  788. /* Return error status */
  789. status = HAL_ERROR;
  790. break;
  791. }
  792. }
  793. else if (HAL_ADC_STATE_RESET == hadc->State)
  794. {
  795. switch (CallbackID)
  796. {
  797. case HAL_ADC_MSPINIT_CB_ID :
  798. hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
  799. break;
  800. case HAL_ADC_MSPDEINIT_CB_ID :
  801. hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
  802. break;
  803. default :
  804. /* Update the error code */
  805. hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
  806. /* Return error status */
  807. status = HAL_ERROR;
  808. break;
  809. }
  810. }
  811. else
  812. {
  813. /* Update the error code */
  814. hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
  815. /* Return error status */
  816. status = HAL_ERROR;
  817. }
  818. return status;
  819. }
  820. #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
  821. /**
  822. * @}
  823. */
  824. /** @defgroup ADC_Exported_Functions_Group2 ADC Input and Output operation functions
  825. * @brief ADC IO operation functions
  826. *
  827. @verbatim
  828. ===============================================================================
  829. ##### IO operation functions #####
  830. ===============================================================================
  831. [..] This section provides functions allowing to:
  832. (+) Start conversion of regular group.
  833. (+) Stop conversion of regular group.
  834. (+) Poll for conversion complete on regular group.
  835. (+) Poll for conversion event.
  836. (+) Get result of regular channel conversion.
  837. (+) Start conversion of regular group and enable interruptions.
  838. (+) Stop conversion of regular group and disable interruptions.
  839. (+) Handle ADC interrupt request
  840. (+) Start conversion of regular group and enable DMA transfer.
  841. (+) Stop conversion of regular group and disable ADC DMA transfer.
  842. @endverbatim
  843. * @{
  844. */
  845. /**
  846. * @brief Enable ADC, start conversion of regular group.
  847. * @note Interruptions enabled in this function: None.
  848. * @param hadc ADC handle
  849. * @retval HAL status
  850. */
  851. HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef *hadc)
  852. {
  853. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  854. /* Check the parameters */
  855. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  856. /* Perform ADC enable and conversion start if no conversion is on going */
  857. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
  858. {
  859. /* Process locked */
  860. __HAL_LOCK(hadc);
  861. /* Enable the ADC peripheral */
  862. /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
  863. /* performed automatically by hardware. */
  864. if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
  865. {
  866. tmp_hal_status = ADC_Enable(hadc);
  867. }
  868. /* Start conversion if ADC is effectively enabled */
  869. if (tmp_hal_status == HAL_OK)
  870. {
  871. /* Set ADC state */
  872. /* - Clear state bitfield related to regular group conversion results */
  873. /* - Set state bitfield related to regular operation */
  874. ADC_STATE_CLR_SET(hadc->State,
  875. HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
  876. HAL_ADC_STATE_REG_BUSY);
  877. /* Reset ADC all error code fields */
  878. ADC_CLEAR_ERRORCODE(hadc);
  879. /* Process unlocked */
  880. /* Unlock before starting ADC conversions: in case of potential */
  881. /* interruption, to let the process to ADC IRQ Handler. */
  882. __HAL_UNLOCK(hadc);
  883. /* Clear regular group conversion flag and overrun flag */
  884. /* (To ensure of no unknown state from potential previous ADC */
  885. /* operations) */
  886. __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
  887. /* Enable conversion of regular group. */
  888. /* If software start has been selected, conversion starts immediately. */
  889. /* If external trigger has been selected, conversion will start at next */
  890. /* trigger event. */
  891. hadc->Instance->CR |= ADC_CR_ADSTART;
  892. }
  893. }
  894. else
  895. {
  896. tmp_hal_status = HAL_BUSY;
  897. }
  898. /* Return function status */
  899. return tmp_hal_status;
  900. }
  901. /**
  902. * @brief Stop ADC conversion of regular group (and injected channels in
  903. * case of auto_injection mode), disable ADC peripheral.
  904. * @param hadc ADC handle
  905. * @retval HAL status.
  906. */
  907. HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef *hadc)
  908. {
  909. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  910. /* Check the parameters */
  911. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  912. /* Process locked */
  913. __HAL_LOCK(hadc);
  914. /* 1. Stop potential conversion on going, on ADC group regular */
  915. tmp_hal_status = ADC_ConversionStop(hadc);
  916. /* Disable ADC peripheral if conversions are effectively stopped */
  917. if (tmp_hal_status == HAL_OK)
  918. {
  919. /* 2. Disable the ADC peripheral */
  920. tmp_hal_status = ADC_Disable(hadc);
  921. /* Check if ADC is effectively disabled */
  922. if (tmp_hal_status == HAL_OK)
  923. {
  924. /* Set ADC state */
  925. ADC_STATE_CLR_SET(hadc->State,
  926. HAL_ADC_STATE_REG_BUSY,
  927. HAL_ADC_STATE_READY);
  928. }
  929. }
  930. /* Process unlocked */
  931. __HAL_UNLOCK(hadc);
  932. /* Return function status */
  933. return tmp_hal_status;
  934. }
  935. /**
  936. * @brief Wait for regular group conversion to be completed.
  937. * @note ADC conversion flags EOS (end of sequence) and EOC (end of
  938. * conversion) are cleared by this function, with an exception:
  939. * if low power feature "LowPowerAutoWait" is enabled, flags are
  940. * not cleared to not interfere with this feature until data register
  941. * is read using function HAL_ADC_GetValue().
  942. * @note This function cannot be used in a particular setup: ADC configured
  943. * in DMA mode and polling for end of each conversion (ADC init
  944. * parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV).
  945. * In this case, DMA resets the flag EOC and polling cannot be
  946. * performed on each conversion. Nevertheless, polling can still
  947. * be performed on the complete sequence (ADC init
  948. * parameter "EOCSelection" set to ADC_EOC_SEQ_CONV).
  949. * @param hadc ADC handle
  950. * @param Timeout Timeout value in millisecond.
  951. * @retval HAL status
  952. */
  953. HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout)
  954. {
  955. uint32_t tickstart = 0;
  956. uint32_t tmp_Flag_EOC = 0x00;
  957. /* Check the parameters */
  958. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  959. /* If end of conversion selected to end of sequence conversions */
  960. if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
  961. {
  962. tmp_Flag_EOC = ADC_FLAG_EOS;
  963. }
  964. /* If end of conversion selected to end of unitary conversion */
  965. else /* ADC_EOC_SINGLE_CONV */
  966. {
  967. /* Verification that ADC configuration is compliant with polling for */
  968. /* each conversion: */
  969. /* Particular case is ADC configured in DMA mode and ADC sequencer with */
  970. /* several ranks and polling for end of each conversion. */
  971. /* For code simplicity sake, this particular case is generalized to */
  972. /* ADC configured in DMA mode and and polling for end of each conversion. */
  973. if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN))
  974. {
  975. /* Update ADC state machine to error */
  976. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  977. /* Process unlocked */
  978. __HAL_UNLOCK(hadc);
  979. return HAL_ERROR;
  980. }
  981. else
  982. {
  983. tmp_Flag_EOC = (ADC_FLAG_EOC | ADC_FLAG_EOS);
  984. }
  985. }
  986. /* Get tick count */
  987. tickstart = HAL_GetTick();
  988. /* Wait until End of unitary conversion or sequence conversions flag is raised */
  989. while (HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
  990. {
  991. /* Check if timeout is disabled (set to infinite wait) */
  992. if (Timeout != HAL_MAX_DELAY)
  993. {
  994. if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
  995. {
  996. /* New check to avoid false timeout detection in case of preemption */
  997. if (HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
  998. {
  999. /* Update ADC state machine to timeout */
  1000. SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
  1001. /* Process unlocked */
  1002. __HAL_UNLOCK(hadc);
  1003. return HAL_TIMEOUT;
  1004. }
  1005. }
  1006. }
  1007. }
  1008. /* Update ADC state machine */
  1009. SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
  1010. /* Determine whether any further conversion upcoming on group regular */
  1011. /* by external trigger, continuous mode or scan sequence on going. */
  1012. if (ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
  1013. (hadc->Init.ContinuousConvMode == DISABLE))
  1014. {
  1015. /* If End of Sequence is reached, disable interrupts */
  1016. if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS))
  1017. {
  1018. /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
  1019. /* ADSTART==0 (no conversion on going) */
  1020. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
  1021. {
  1022. /* Disable ADC end of single conversion interrupt on group regular */
  1023. /* Note: Overrun interrupt was enabled with EOC interrupt in */
  1024. /* HAL_Start_IT(), but is not disabled here because can be used */
  1025. /* by overrun IRQ process below. */
  1026. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
  1027. /* Set ADC state */
  1028. ADC_STATE_CLR_SET(hadc->State,
  1029. HAL_ADC_STATE_REG_BUSY,
  1030. HAL_ADC_STATE_READY);
  1031. }
  1032. else
  1033. {
  1034. /* Change ADC state to error state */
  1035. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  1036. /* Set ADC error code to ADC peripheral internal error */
  1037. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  1038. }
  1039. }
  1040. }
  1041. /* Clear end of conversion flag of regular group if low power feature */
  1042. /* "LowPowerAutoWait " is disabled, to not interfere with this feature */
  1043. /* until data register is read using function HAL_ADC_GetValue(). */
  1044. if (hadc->Init.LowPowerAutoWait == DISABLE)
  1045. {
  1046. /* Clear regular group conversion flag */
  1047. __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS));
  1048. }
  1049. /* Return function status */
  1050. return HAL_OK;
  1051. }
  1052. /**
  1053. * @brief Poll for ADC event.
  1054. * @param hadc ADC handle
  1055. * @param EventType the ADC event type.
  1056. * This parameter can be one of the following values:
  1057. * @arg ADC_AWD_EVENT: ADC Analog watchdog event
  1058. * @arg ADC_OVR_EVENT: ADC Overrun event
  1059. * @param Timeout Timeout value in millisecond.
  1060. * @note The relevant flag is cleared if found to be set, except for ADC_FLAG_OVR.
  1061. * Indeed, the latter is reset only if hadc->Init.Overrun field is set
  1062. * to ADC_OVR_DATA_OVERWRITTEN. Otherwise, data register may be potentially overwritten
  1063. * by a new converted data as soon as OVR is cleared.
  1064. * To reset OVR flag once the preserved data is retrieved, the user can resort
  1065. * to macro __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
  1066. * @retval HAL status
  1067. */
  1068. HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef *hadc, uint32_t EventType, uint32_t Timeout)
  1069. {
  1070. uint32_t tickstart = 0U;
  1071. /* Check the parameters */
  1072. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1073. assert_param(IS_ADC_EVENT_TYPE(EventType));
  1074. /* Get tick count */
  1075. tickstart = HAL_GetTick();
  1076. /* Check selected event flag */
  1077. while (__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
  1078. {
  1079. /* Check if timeout is disabled (set to infinite wait) */
  1080. if (Timeout != HAL_MAX_DELAY)
  1081. {
  1082. if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
  1083. {
  1084. /* New check to avoid false timeout detection in case of preemption */
  1085. if (__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
  1086. {
  1087. /* Update ADC state machine to timeout */
  1088. SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
  1089. /* Process unlocked */
  1090. __HAL_UNLOCK(hadc);
  1091. return HAL_TIMEOUT;
  1092. }
  1093. }
  1094. }
  1095. }
  1096. switch (EventType)
  1097. {
  1098. /* Analog watchdog (level out of window) event */
  1099. case ADC_AWD_EVENT:
  1100. /* Set ADC state */
  1101. SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
  1102. /* Clear ADC analog watchdog flag */
  1103. __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
  1104. break;
  1105. /* Overrun event */
  1106. default: /* Case ADC_OVR_EVENT */
  1107. /* If overrun is set to overwrite previous data, overrun event is not */
  1108. /* considered as an error. */
  1109. /* (cf ref manual "Managing conversions without using the DMA and without */
  1110. /* overrun ") */
  1111. if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED)
  1112. {
  1113. /* Set ADC state */
  1114. SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR);
  1115. /* Set ADC error code to overrun */
  1116. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
  1117. }
  1118. /* Clear ADC Overrun flag */
  1119. __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
  1120. break;
  1121. }
  1122. /* Return function status */
  1123. return HAL_OK;
  1124. }
  1125. /**
  1126. * @brief Enable ADC, start conversion of regular group with interruption.
  1127. * @note Interruptions enabled in this function according to initialization
  1128. * setting : EOC (end of conversion), EOS (end of sequence),
  1129. * OVR overrun.
  1130. * Each of these interruptions has its dedicated callback function.
  1131. * @note To guarantee a proper reset of all interruptions once all the needed
  1132. * conversions are obtained, HAL_ADC_Stop_IT() must be called to ensure
  1133. * a correct stop of the IT-based conversions.
  1134. * @note By default, HAL_ADC_Start_IT() doesn't enable the End Of Sampling
  1135. * interruption. If required (e.g. in case of oversampling with trigger
  1136. * mode), the user must:
  1137. * 1. first clear the EOSMP flag if set with macro __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOSMP)
  1138. * 2. then enable the EOSMP interrupt with macro __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOSMP)
  1139. * before calling HAL_ADC_Start_IT().
  1140. * @param hadc ADC handle
  1141. * @retval HAL status
  1142. */
  1143. HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef *hadc)
  1144. {
  1145. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  1146. /* Check the parameters */
  1147. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1148. /* Perform ADC enable and conversion start if no conversion is on going */
  1149. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
  1150. {
  1151. /* Process locked */
  1152. __HAL_LOCK(hadc);
  1153. /* Enable the ADC peripheral */
  1154. /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
  1155. /* performed automatically by hardware. */
  1156. if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
  1157. {
  1158. tmp_hal_status = ADC_Enable(hadc);
  1159. }
  1160. /* Start conversion if ADC is effectively enabled */
  1161. if (tmp_hal_status == HAL_OK)
  1162. {
  1163. /* Set ADC state */
  1164. /* - Clear state bitfield related to regular group conversion results */
  1165. /* - Set state bitfield related to regular operation */
  1166. ADC_STATE_CLR_SET(hadc->State,
  1167. HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
  1168. HAL_ADC_STATE_REG_BUSY);
  1169. /* Reset ADC all error code fields */
  1170. ADC_CLEAR_ERRORCODE(hadc);
  1171. /* Process unlocked */
  1172. /* Unlock before starting ADC conversions: in case of potential */
  1173. /* interruption, to let the process to ADC IRQ Handler. */
  1174. __HAL_UNLOCK(hadc);
  1175. /* Clear regular group conversion flag and overrun flag */
  1176. /* (To ensure of no unknown state from potential previous ADC */
  1177. /* operations) */
  1178. __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
  1179. /* Enable ADC end of conversion interrupt */
  1180. /* Enable ADC overrun interrupt */
  1181. switch (hadc->Init.EOCSelection)
  1182. {
  1183. case ADC_EOC_SEQ_CONV:
  1184. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
  1185. __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR));
  1186. break;
  1187. /* case ADC_EOC_SINGLE_CONV */
  1188. default:
  1189. __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
  1190. break;
  1191. }
  1192. /* Enable conversion of regular group. */
  1193. /* If software start has been selected, conversion starts immediately. */
  1194. /* If external trigger has been selected, conversion will start at next */
  1195. /* trigger event. */
  1196. hadc->Instance->CR |= ADC_CR_ADSTART;
  1197. }
  1198. }
  1199. else
  1200. {
  1201. tmp_hal_status = HAL_BUSY;
  1202. }
  1203. /* Return function status */
  1204. return tmp_hal_status;
  1205. }
  1206. /**
  1207. * @brief Stop ADC conversion of regular group (and injected group in
  1208. * case of auto_injection mode), disable interrution of
  1209. * end-of-conversion, disable ADC peripheral.
  1210. * @param hadc ADC handle
  1211. * @retval HAL status.
  1212. */
  1213. HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef *hadc)
  1214. {
  1215. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  1216. /* Check the parameters */
  1217. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1218. /* Process locked */
  1219. __HAL_LOCK(hadc);
  1220. /* 1. Stop potential conversion on going, on ADC group regular */
  1221. tmp_hal_status = ADC_ConversionStop(hadc);
  1222. /* Disable ADC peripheral if conversions are effectively stopped */
  1223. if (tmp_hal_status == HAL_OK)
  1224. {
  1225. /* Disable ADC end of conversion interrupt for regular group */
  1226. /* Disable ADC overrun interrupt */
  1227. __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
  1228. /* 2. Disable the ADC peripheral */
  1229. tmp_hal_status = ADC_Disable(hadc);
  1230. /* Check if ADC is effectively disabled */
  1231. if (tmp_hal_status == HAL_OK)
  1232. {
  1233. /* Set ADC state */
  1234. ADC_STATE_CLR_SET(hadc->State,
  1235. HAL_ADC_STATE_REG_BUSY,
  1236. HAL_ADC_STATE_READY);
  1237. }
  1238. }
  1239. /* Process unlocked */
  1240. __HAL_UNLOCK(hadc);
  1241. /* Return function status */
  1242. return tmp_hal_status;
  1243. }
  1244. /**
  1245. * @brief Enable ADC, start conversion of regular group and transfer result through DMA.
  1246. * @note Interruptions enabled in this function:
  1247. * overrun (if applicable), DMA half transfer, DMA transfer complete.
  1248. * Each of these interruptions has its dedicated callback function.
  1249. * @param hadc ADC handle
  1250. * @param pData Destination Buffer address.
  1251. * @param Length Length of data to be transferred from ADC peripheral to memory (in bytes)
  1252. * @retval HAL status.
  1253. */
  1254. HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length)
  1255. {
  1256. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  1257. /* Check the parameters */
  1258. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1259. /* Perform ADC enable and conversion start if no conversion is on going */
  1260. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
  1261. {
  1262. /* Process locked */
  1263. __HAL_LOCK(hadc);
  1264. /* Enable ADC DMA mode */
  1265. hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN;
  1266. /* Enable the ADC peripheral */
  1267. /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
  1268. /* performed automatically by hardware. */
  1269. if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
  1270. {
  1271. tmp_hal_status = ADC_Enable(hadc);
  1272. }
  1273. /* Start conversion if ADC is effectively enabled */
  1274. if (tmp_hal_status == HAL_OK)
  1275. {
  1276. /* Set ADC state */
  1277. /* - Clear state bitfield related to regular group conversion results */
  1278. /* - Set state bitfield related to regular operation */
  1279. ADC_STATE_CLR_SET(hadc->State,
  1280. HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
  1281. HAL_ADC_STATE_REG_BUSY);
  1282. /* Reset ADC all error code fields */
  1283. ADC_CLEAR_ERRORCODE(hadc);
  1284. /* Process unlocked */
  1285. /* Unlock before starting ADC conversions: in case of potential */
  1286. /* interruption, to let the process to ADC IRQ Handler. */
  1287. __HAL_UNLOCK(hadc);
  1288. /* Set the DMA transfer complete callback */
  1289. hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
  1290. /* Set the DMA half transfer complete callback */
  1291. hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
  1292. /* Set the DMA error callback */
  1293. hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
  1294. /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
  1295. /* start (in case of SW start): */
  1296. /* Clear regular group conversion flag and overrun flag */
  1297. /* (To ensure of no unknown state from potential previous ADC */
  1298. /* operations) */
  1299. __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
  1300. /* Enable ADC overrun interrupt */
  1301. __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
  1302. /* Start the DMA channel */
  1303. HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
  1304. /* Enable conversion of regular group. */
  1305. /* If software start has been selected, conversion starts immediately. */
  1306. /* If external trigger has been selected, conversion will start at next */
  1307. /* trigger event. */
  1308. hadc->Instance->CR |= ADC_CR_ADSTART;
  1309. }
  1310. }
  1311. else
  1312. {
  1313. tmp_hal_status = HAL_BUSY;
  1314. }
  1315. /* Return function status */
  1316. return tmp_hal_status;
  1317. }
  1318. /**
  1319. * @brief Stop ADC conversion of regular group (and injected group in
  1320. * case of auto_injection mode), disable ADC DMA transfer, disable
  1321. * ADC peripheral.
  1322. * Each of these interruptions has its dedicated callback function.
  1323. * @param hadc ADC handle
  1324. * @retval HAL status.
  1325. */
  1326. HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef *hadc)
  1327. {
  1328. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  1329. /* Check the parameters */
  1330. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1331. /* Process locked */
  1332. __HAL_LOCK(hadc);
  1333. /* 1. Stop potential ADC group regular conversion on going */
  1334. tmp_hal_status = ADC_ConversionStop(hadc);
  1335. /* Disable ADC peripheral if conversions are effectively stopped */
  1336. if (tmp_hal_status == HAL_OK)
  1337. {
  1338. /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
  1339. CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN);
  1340. /* Disable the DMA channel (in case of DMA in circular mode or stop */
  1341. /* while DMA transfer is on going) */
  1342. if (hadc->DMA_Handle->State == HAL_DMA_STATE_BUSY)
  1343. {
  1344. tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
  1345. /* Check if DMA channel effectively disabled */
  1346. if (tmp_hal_status != HAL_OK)
  1347. {
  1348. /* Update ADC state machine to error */
  1349. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
  1350. }
  1351. }
  1352. /* Disable ADC overrun interrupt */
  1353. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
  1354. /* 2. Disable the ADC peripheral */
  1355. /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep */
  1356. /* in memory a potential failing status. */
  1357. if (tmp_hal_status == HAL_OK)
  1358. {
  1359. tmp_hal_status = ADC_Disable(hadc);
  1360. }
  1361. else
  1362. {
  1363. ADC_Disable(hadc);
  1364. }
  1365. /* Check if ADC is effectively disabled */
  1366. if (tmp_hal_status == HAL_OK)
  1367. {
  1368. /* Set ADC state */
  1369. ADC_STATE_CLR_SET(hadc->State,
  1370. HAL_ADC_STATE_REG_BUSY,
  1371. HAL_ADC_STATE_READY);
  1372. }
  1373. }
  1374. /* Process unlocked */
  1375. __HAL_UNLOCK(hadc);
  1376. /* Return function status */
  1377. return tmp_hal_status;
  1378. }
  1379. /**
  1380. * @brief Get ADC regular group conversion result.
  1381. * @note Reading register DR automatically clears ADC flag EOC
  1382. * (ADC group regular end of unitary conversion).
  1383. * @note This function does not clear ADC flag EOS
  1384. * (ADC group regular end of sequence conversion).
  1385. * Occurrence of flag EOS rising:
  1386. * - If sequencer is composed of 1 rank, flag EOS is equivalent
  1387. * to flag EOC.
  1388. * - If sequencer is composed of several ranks, during the scan
  1389. * sequence flag EOC only is raised, at the end of the scan sequence
  1390. * both flags EOC and EOS are raised.
  1391. * To clear this flag, either use function:
  1392. * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
  1393. * model polling: @ref HAL_ADC_PollForConversion()
  1394. * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS).
  1395. * @param hadc ADC handle
  1396. * @retval ADC group regular conversion data
  1397. */
  1398. uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef *hadc)
  1399. {
  1400. /* Check the parameters */
  1401. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1402. /* Note: EOC flag is not cleared here by software because automatically */
  1403. /* cleared by hardware when reading register DR. */
  1404. /* Return ADC converted value */
  1405. return hadc->Instance->DR;
  1406. }
  1407. /**
  1408. * @brief Handle ADC interrupt request.
  1409. * @param hadc ADC handle
  1410. * @retval None
  1411. */
  1412. void HAL_ADC_IRQHandler(ADC_HandleTypeDef *hadc)
  1413. {
  1414. uint32_t tmp_isr = hadc->Instance->ISR;
  1415. uint32_t tmp_ier = hadc->Instance->IER;
  1416. /* Check the parameters */
  1417. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1418. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
  1419. assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
  1420. /* ========== Check End of Conversion flag for regular group ========== */
  1421. if ((((tmp_isr & ADC_FLAG_EOC) == ADC_FLAG_EOC) && ((tmp_ier & ADC_IT_EOC) == ADC_IT_EOC)) ||
  1422. (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS)))
  1423. {
  1424. /* Update state machine on conversion status if not in error state */
  1425. if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
  1426. {
  1427. /* Set ADC state */
  1428. SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
  1429. }
  1430. /* Determine whether any further conversion upcoming on group regular */
  1431. /* by external trigger, continuous mode or scan sequence on going. */
  1432. if (ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
  1433. (hadc->Init.ContinuousConvMode == DISABLE))
  1434. {
  1435. /* If End of Sequence is reached, disable interrupts */
  1436. if ((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS)
  1437. {
  1438. /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
  1439. /* ADSTART==0 (no conversion on going) */
  1440. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
  1441. {
  1442. /* Disable ADC end of single conversion interrupt on group regular */
  1443. /* Note: Overrun interrupt was enabled with EOC interrupt in */
  1444. /* HAL_Start_IT(), but is not disabled here because can be used */
  1445. /* by overrun IRQ process below. */
  1446. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
  1447. /* Set ADC state */
  1448. ADC_STATE_CLR_SET(hadc->State,
  1449. HAL_ADC_STATE_REG_BUSY,
  1450. HAL_ADC_STATE_READY);
  1451. }
  1452. else
  1453. {
  1454. /* Change ADC state to error state */
  1455. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  1456. /* Set ADC error code to ADC peripheral internal error */
  1457. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  1458. }
  1459. }
  1460. }
  1461. /* Note: into callback, to determine if conversion has been triggered */
  1462. /* from EOC or EOS, possibility to use: */
  1463. /* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */
  1464. #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
  1465. hadc->ConvCpltCallback(hadc);
  1466. #else
  1467. HAL_ADC_ConvCpltCallback(hadc);
  1468. #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
  1469. /* Clear regular group conversion flag */
  1470. /* Note: in case of overrun set to ADC_OVR_DATA_PRESERVED, end of */
  1471. /* conversion flags clear induces the release of the preserved data.*/
  1472. /* Therefore, if the preserved data value is needed, it must be */
  1473. /* read preliminarily into HAL_ADC_ConvCpltCallback(). */
  1474. /* Note: Management of low power auto-wait enabled: flags must be cleared */
  1475. /* by user when fetching ADC conversion data. */
  1476. /* This case is managed in IRQ handler, but this low-power mode */
  1477. /* should not be used with programming model IT or DMA. */
  1478. /* Refer to comment of parameter "LowPowerAutoWait". */
  1479. if (hadc->Init.LowPowerAutoWait != ENABLE)
  1480. {
  1481. __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS));
  1482. }
  1483. }
  1484. /* ========== Check analog watchdog 1 flag ========== */
  1485. if (((tmp_isr & ADC_FLAG_AWD) == ADC_FLAG_AWD) && ((tmp_ier & ADC_IT_AWD) == ADC_IT_AWD))
  1486. {
  1487. /* Set ADC state */
  1488. SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
  1489. #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
  1490. hadc->LevelOutOfWindowCallback(hadc);
  1491. #else
  1492. HAL_ADC_LevelOutOfWindowCallback(hadc);
  1493. #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
  1494. /* Clear ADC Analog watchdog flag */
  1495. __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
  1496. }
  1497. /* ========== Check Overrun flag ========== */
  1498. if (((tmp_isr & ADC_FLAG_OVR) == ADC_FLAG_OVR) && ((tmp_ier & ADC_IT_OVR) == ADC_IT_OVR))
  1499. {
  1500. /* If overrun is set to overwrite previous data (default setting), */
  1501. /* overrun event is not considered as an error. */
  1502. /* (cf ref manual "Managing conversions without using the DMA and without */
  1503. /* overrun ") */
  1504. /* Exception for usage with DMA overrun event always considered as an */
  1505. /* error. */
  1506. if ((hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) ||
  1507. HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN))
  1508. {
  1509. /* Set ADC error code to overrun */
  1510. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
  1511. /* Clear ADC overrun flag */
  1512. __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
  1513. #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
  1514. hadc->ErrorCallback(hadc);
  1515. #else
  1516. HAL_ADC_ErrorCallback(hadc);
  1517. #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
  1518. }
  1519. /* Clear the Overrun flag */
  1520. __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
  1521. }
  1522. }
  1523. /**
  1524. * @brief Conversion complete callback in non-blocking mode.
  1525. * @param hadc ADC handle
  1526. * @retval None
  1527. */
  1528. __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc)
  1529. {
  1530. /* Prevent unused argument(s) compilation warning */
  1531. UNUSED(hadc);
  1532. /* NOTE : This function should not be modified. When the callback is needed,
  1533. function HAL_ADC_ConvCpltCallback must be implemented in the user file.
  1534. */
  1535. }
  1536. /**
  1537. * @brief Conversion DMA half-transfer callback in non-blocking mode.
  1538. * @param hadc ADC handle
  1539. * @retval None
  1540. */
  1541. __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef *hadc)
  1542. {
  1543. /* Prevent unused argument(s) compilation warning */
  1544. UNUSED(hadc);
  1545. /* NOTE : This function should not be modified. When the callback is needed,
  1546. function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
  1547. */
  1548. }
  1549. /**
  1550. * @brief Analog watchdog 1 callback in non-blocking mode.
  1551. * @param hadc ADC handle
  1552. * @retval None
  1553. */
  1554. __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef *hadc)
  1555. {
  1556. /* Prevent unused argument(s) compilation warning */
  1557. UNUSED(hadc);
  1558. /* NOTE : This function should not be modified. When the callback is needed,
  1559. function HAL_ADC_LevelOutOfWindowCallback must be implemented in the user file.
  1560. */
  1561. }
  1562. /**
  1563. * @brief ADC error callback in non-blocking mode
  1564. * (ADC conversion with interruption or transfer by DMA).
  1565. * @note In case of error due to overrun when using ADC with DMA transfer
  1566. * (HAL ADC handle parameter "ErrorCode" to state "HAL_ADC_ERROR_OVR"):
  1567. * - Reinitialize the DMA using function "HAL_ADC_Stop_DMA()".
  1568. * - If needed, restart a new ADC conversion using function
  1569. * "HAL_ADC_Start_DMA()"
  1570. * (this function is also clearing overrun flag)
  1571. * @param hadc ADC handle
  1572. * @retval None
  1573. */
  1574. __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
  1575. {
  1576. /* Prevent unused argument(s) compilation warning */
  1577. UNUSED(hadc);
  1578. /* NOTE : This function should not be modified. When the callback is needed,
  1579. function HAL_ADC_ErrorCallback must be implemented in the user file.
  1580. */
  1581. }
  1582. /**
  1583. * @}
  1584. */
  1585. /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
  1586. * @brief Peripheral Control functions
  1587. *
  1588. @verbatim
  1589. ===============================================================================
  1590. ##### Peripheral Control functions #####
  1591. ===============================================================================
  1592. [..] This section provides functions allowing to:
  1593. (+) Configure channels on regular group
  1594. (+) Configure the analog watchdog
  1595. @endverbatim
  1596. * @{
  1597. */
  1598. /**
  1599. * @brief Configure a channel to be assigned to ADC group regular.
  1600. * @note In case of usage of internal measurement channels:
  1601. * VrefInt/Vlcd(STM32L0x3xx only)/TempSensor.
  1602. * Sampling time constraints must be respected (sampling time can be
  1603. * adjusted in function of ADC clock frequency and sampling time
  1604. * setting).
  1605. * Refer to device datasheet for timings values, parameters TS_vrefint,
  1606. * TS_vlcd (STM32L0x3xx only), TS_temp (values rough order: 5us to 17us).
  1607. * These internal paths can be be disabled using function
  1608. * HAL_ADC_DeInit().
  1609. * @note Possibility to update parameters on the fly:
  1610. * This function initializes channel into ADC group regular,
  1611. * following calls to this function can be used to reconfigure
  1612. * some parameters of structure "ADC_ChannelConfTypeDef" on the fly,
  1613. * without resetting the ADC.
  1614. * The setting of these parameters is conditioned to ADC state:
  1615. * Refer to comments of structure "ADC_ChannelConfTypeDef".
  1616. * @param hadc ADC handle
  1617. * @param sConfig Structure of ADC channel assigned to ADC group regular.
  1618. * @retval HAL status
  1619. */
  1620. HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef *hadc, ADC_ChannelConfTypeDef *sConfig)
  1621. {
  1622. /* Check the parameters */
  1623. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1624. assert_param(IS_ADC_CHANNEL(sConfig->Channel));
  1625. assert_param(IS_ADC_RANK(sConfig->Rank));
  1626. /* Process locked */
  1627. __HAL_LOCK(hadc);
  1628. /* Parameters update conditioned to ADC state: */
  1629. /* Parameters that can be updated when ADC is disabled or enabled without */
  1630. /* conversion on going on regular group: */
  1631. /* - Channel number */
  1632. /* - Management of internal measurement channels: Vbat/VrefInt/TempSensor */
  1633. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) != RESET)
  1634. {
  1635. /* Update ADC state machine to error */
  1636. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  1637. /* Process unlocked */
  1638. __HAL_UNLOCK(hadc);
  1639. return HAL_ERROR;
  1640. }
  1641. if (sConfig->Rank != ADC_RANK_NONE)
  1642. {
  1643. /* Enable selected channels */
  1644. hadc->Instance->CHSELR |= (uint32_t)(sConfig->Channel & ADC_CHANNEL_MASK);
  1645. /* Management of internal measurement channels: Vlcd (STM32L0x3xx only)/VrefInt/TempSensor */
  1646. /* internal measurement paths enable: If internal channel selected, enable */
  1647. /* dedicated internal buffers and path. */
  1648. #if defined(ADC_CCR_TSEN)
  1649. /* If Temperature sensor channel is selected, then enable the internal */
  1650. /* buffers and path */
  1651. if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_TEMPSENSOR) == (ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_MASK))
  1652. {
  1653. ADC->CCR |= ADC_CCR_TSEN;
  1654. /* Delay for temperature sensor stabilization time */
  1655. ADC_DelayMicroSecond(ADC_TEMPSENSOR_DELAY_US);
  1656. }
  1657. #endif
  1658. /* If VRefInt channel is selected, then enable the internal buffers and path */
  1659. if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VREFINT) == (ADC_CHANNEL_VREFINT & ADC_CHANNEL_MASK))
  1660. {
  1661. ADC->CCR |= ADC_CCR_VREFEN;
  1662. }
  1663. #if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx)
  1664. /* If Vlcd channel is selected, then enable the internal buffers and path */
  1665. if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VLCD) == (ADC_CHANNEL_VLCD & ADC_CHANNEL_MASK))
  1666. {
  1667. ADC->CCR |= ADC_CCR_VLCDEN;
  1668. }
  1669. #endif
  1670. }
  1671. else
  1672. {
  1673. /* Regular sequence configuration */
  1674. /* Reset the channel selection register from the selected channel */
  1675. hadc->Instance->CHSELR &= ~((uint32_t)(sConfig->Channel & ADC_CHANNEL_MASK));
  1676. /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */
  1677. /* internal measurement paths disable: If internal channel selected, */
  1678. /* disable dedicated internal buffers and path. */
  1679. #if defined(ADC_CCR_TSEN)
  1680. if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_TEMPSENSOR) == (ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_MASK))
  1681. {
  1682. ADC->CCR &= ~ADC_CCR_TSEN;
  1683. }
  1684. #endif
  1685. /* If VRefInt channel is selected, then enable the internal buffers and path */
  1686. if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VREFINT) == (ADC_CHANNEL_VREFINT & ADC_CHANNEL_MASK))
  1687. {
  1688. ADC->CCR &= ~ADC_CCR_VREFEN;
  1689. }
  1690. #if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx)
  1691. /* If Vlcd channel is selected, then enable the internal buffers and path */
  1692. if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VLCD) == (ADC_CHANNEL_VLCD & ADC_CHANNEL_MASK))
  1693. {
  1694. ADC->CCR &= ~ADC_CCR_VLCDEN;
  1695. }
  1696. #endif
  1697. }
  1698. /* Process unlocked */
  1699. __HAL_UNLOCK(hadc);
  1700. /* Return function status */
  1701. return HAL_OK;
  1702. }
  1703. /**
  1704. * @brief Configure the analog watchdog.
  1705. * @note Possibility to update parameters on the fly:
  1706. * This function initializes the selected analog watchdog, successive
  1707. * calls to this function can be used to reconfigure some parameters
  1708. * of structure "ADC_AnalogWDGConfTypeDef" on the fly, without resetting
  1709. * the ADC.
  1710. * The setting of these parameters is conditioned to ADC state.
  1711. * For parameters constraints, see comments of structure
  1712. * "ADC_AnalogWDGConfTypeDef".
  1713. * @note Analog watchdog thresholds can be modified while ADC conversion
  1714. * is on going.
  1715. * In this case, some constraints must be taken into account:
  1716. * the programmed threshold values are effective from the next
  1717. * ADC EOC (end of unitary conversion).
  1718. * Considering that registers write delay may happen due to
  1719. * bus activity, this might cause an uncertainty on the
  1720. * effective timing of the new programmed threshold values.
  1721. * @param hadc ADC handle
  1722. * @param AnalogWDGConfig Structure of ADC analog watchdog configuration
  1723. * @retval HAL status
  1724. */
  1725. HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef *hadc, ADC_AnalogWDGConfTypeDef *AnalogWDGConfig)
  1726. {
  1727. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  1728. uint32_t tmpAWDHighThresholdShifted;
  1729. uint32_t tmpAWDLowThresholdShifted;
  1730. /* Check the parameters */
  1731. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1732. assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode));
  1733. assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
  1734. if (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG)
  1735. {
  1736. assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
  1737. }
  1738. /* Verify if threshold is within the selected ADC resolution */
  1739. assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold));
  1740. assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold));
  1741. /* Process locked */
  1742. __HAL_LOCK(hadc);
  1743. /* Parameters update conditioned to ADC state: */
  1744. /* Parameters that can be updated when ADC is disabled or enabled without */
  1745. /* conversion on going on regular group: */
  1746. /* - Analog watchdog channels */
  1747. /* - Analog watchdog thresholds */
  1748. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
  1749. {
  1750. /* Configure ADC Analog watchdog interrupt */
  1751. if (AnalogWDGConfig->ITMode == ENABLE)
  1752. {
  1753. /* Enable the ADC Analog watchdog interrupt */
  1754. __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
  1755. }
  1756. else
  1757. {
  1758. /* Disable the ADC Analog watchdog interrupt */
  1759. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
  1760. }
  1761. /* Configuration of analog watchdog: */
  1762. /* - Set the analog watchdog mode */
  1763. /* - Set the Analog watchdog channel (is not used if watchdog */
  1764. /* mode "all channels": ADC_CFGR1_AWD1SGL=0) */
  1765. hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDSGL |
  1766. ADC_CFGR1_AWDEN |
  1767. ADC_CFGR1_AWDCH);
  1768. hadc->Instance->CFGR1 |= (AnalogWDGConfig->WatchdogMode |
  1769. (AnalogWDGConfig->Channel & ADC_CHANNEL_AWD_MASK));
  1770. /* Shift the offset in function of the selected ADC resolution: Thresholds */
  1771. /* have to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
  1772. tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold);
  1773. tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold);
  1774. /* Clear High & Low high thresholds */
  1775. hadc->Instance->TR &= (uint32_t) ~(ADC_TR_HT | ADC_TR_LT);
  1776. /* Set the high threshold */
  1777. hadc->Instance->TR = ADC_TRX_HIGHTHRESHOLD(tmpAWDHighThresholdShifted);
  1778. /* Set the low threshold */
  1779. hadc->Instance->TR |= tmpAWDLowThresholdShifted;
  1780. }
  1781. /* If a conversion is on going on regular group, no update could be done */
  1782. /* on neither of the AWD configuration structure parameters. */
  1783. else
  1784. {
  1785. /* Update ADC state machine to error */
  1786. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  1787. tmp_hal_status = HAL_ERROR;
  1788. }
  1789. /* Process unlocked */
  1790. __HAL_UNLOCK(hadc);
  1791. /* Return function status */
  1792. return tmp_hal_status;
  1793. }
  1794. /**
  1795. * @}
  1796. */
  1797. /** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions
  1798. * @brief ADC Peripheral State functions
  1799. *
  1800. @verbatim
  1801. ===============================================================================
  1802. ##### Peripheral state and errors functions #####
  1803. ===============================================================================
  1804. [..]
  1805. This subsection provides functions to get in run-time the status of the
  1806. peripheral.
  1807. (+) Check the ADC state
  1808. (+) Check the ADC error code
  1809. @endverbatim
  1810. * @{
  1811. */
  1812. /**
  1813. * @brief Return the ADC handle state.
  1814. * @note ADC state machine is managed by bitfields, ADC status must be
  1815. * compared with states bits.
  1816. * For example:
  1817. * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_REG_BUSY)) "
  1818. * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_AWD1) ) "
  1819. * @param hadc ADC handle
  1820. * @retval ADC handle state (bitfield on 32 bits)
  1821. */
  1822. uint32_t HAL_ADC_GetState(ADC_HandleTypeDef *hadc)
  1823. {
  1824. /* Check the parameters */
  1825. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1826. /* Return ADC handle state */
  1827. return hadc->State;
  1828. }
  1829. /**
  1830. * @brief Return the ADC error code.
  1831. * @param hadc ADC handle
  1832. * @retval ADC error code (bitfield on 32 bits)
  1833. */
  1834. uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
  1835. {
  1836. /* Check the parameters */
  1837. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1838. return hadc->ErrorCode;
  1839. }
  1840. /**
  1841. * @}
  1842. */
  1843. /**
  1844. * @}
  1845. */
  1846. /** @defgroup ADC_Private_Functions ADC Private Functions
  1847. * @{
  1848. */
  1849. /**
  1850. * @brief Enable the selected ADC.
  1851. * @note Prerequisite condition to use this function: ADC must be disabled
  1852. * and voltage regulator must be enabled (done into HAL_ADC_Init()).
  1853. * @note If low power mode AutoPowerOff is enabled, power-on/off phases are
  1854. * performed automatically by hardware.
  1855. * In this mode, this function is useless and must not be called because
  1856. * flag ADC_FLAG_RDY is not usable.
  1857. * Therefore, this function must be called under condition of
  1858. * "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)".
  1859. * @param hadc ADC handle
  1860. * @retval HAL status.
  1861. */
  1862. static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef *hadc)
  1863. {
  1864. uint32_t tickstart = 0U;
  1865. /* ADC enable and wait for ADC ready (in case of ADC is disabled or */
  1866. /* enabling phase not yet completed: flag ADC ready not yet set). */
  1867. /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
  1868. /* causes: ADC clock not running, ...). */
  1869. if (ADC_IS_ENABLE(hadc) == RESET)
  1870. {
  1871. /* Check if conditions to enable the ADC are fulfilled */
  1872. if (ADC_ENABLING_CONDITIONS(hadc) == RESET)
  1873. {
  1874. /* Update ADC state machine to error */
  1875. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
  1876. /* Set ADC error code to ADC peripheral internal error */
  1877. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  1878. return HAL_ERROR;
  1879. }
  1880. /* Enable the ADC peripheral */
  1881. __HAL_ADC_ENABLE(hadc);
  1882. /* Delay for ADC stabilization time. */
  1883. ADC_DelayMicroSecond(ADC_STAB_DELAY_US);
  1884. /* Get tick count */
  1885. tickstart = HAL_GetTick();
  1886. /* Wait for ADC effectively enabled */
  1887. while (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET)
  1888. {
  1889. if ((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
  1890. {
  1891. /* New check to avoid false timeout detection in case of preemption */
  1892. if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET)
  1893. {
  1894. /* Update ADC state machine to error */
  1895. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
  1896. /* Set ADC error code to ADC peripheral internal error */
  1897. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  1898. return HAL_ERROR;
  1899. }
  1900. }
  1901. }
  1902. }
  1903. /* Return HAL status */
  1904. return HAL_OK;
  1905. }
  1906. /**
  1907. * @brief Disable the selected ADC.
  1908. * @note Prerequisite condition to use this function: ADC conversions must be
  1909. * stopped.
  1910. * @param hadc ADC handle
  1911. * @retval HAL status.
  1912. */
  1913. static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef *hadc)
  1914. {
  1915. uint32_t tickstart = 0U;
  1916. /* Verification if ADC is not already disabled: */
  1917. /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */
  1918. /* disabled. */
  1919. if (ADC_IS_ENABLE(hadc) != RESET)
  1920. {
  1921. /* Check if conditions to disable the ADC are fulfilled */
  1922. if (ADC_DISABLING_CONDITIONS(hadc) != RESET)
  1923. {
  1924. /* Disable the ADC peripheral */
  1925. __HAL_ADC_DISABLE(hadc);
  1926. }
  1927. else
  1928. {
  1929. /* Update ADC state machine to error */
  1930. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
  1931. /* Set ADC error code to ADC peripheral internal error */
  1932. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  1933. return HAL_ERROR;
  1934. }
  1935. /* Wait for ADC effectively disabled */
  1936. /* Get tick count */
  1937. tickstart = HAL_GetTick();
  1938. while (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
  1939. {
  1940. if ((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
  1941. {
  1942. /* New check to avoid false timeout detection in case of preemption */
  1943. if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
  1944. {
  1945. /* Update ADC state machine to error */
  1946. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
  1947. /* Set ADC error code to ADC peripheral internal error */
  1948. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  1949. return HAL_ERROR;
  1950. }
  1951. }
  1952. }
  1953. }
  1954. /* Return HAL status */
  1955. return HAL_OK;
  1956. }
  1957. /**
  1958. * @brief Stop ADC conversion.
  1959. * @note Prerequisite condition to use this function: ADC conversions must be
  1960. * stopped to disable the ADC.
  1961. * @param hadc ADC handle
  1962. * @retval HAL status.
  1963. */
  1964. static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef *hadc)
  1965. {
  1966. uint32_t tickstart = 0U;
  1967. /* Check the parameters */
  1968. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  1969. /* Verification if ADC is not already stopped on regular group to bypass */
  1970. /* this function if not needed. */
  1971. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc))
  1972. {
  1973. /* Stop potential conversion on going on regular group */
  1974. /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */
  1975. if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) &&
  1976. HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS))
  1977. {
  1978. /* Stop conversions on regular group */
  1979. hadc->Instance->CR |= ADC_CR_ADSTP;
  1980. }
  1981. /* Wait for conversion effectively stopped */
  1982. /* Get tick count */
  1983. tickstart = HAL_GetTick();
  1984. while ((hadc->Instance->CR & ADC_CR_ADSTART) != RESET)
  1985. {
  1986. if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
  1987. {
  1988. /* New check to avoid false timeout detection in case of preemption */
  1989. if ((hadc->Instance->CR & ADC_CR_ADSTART) != RESET)
  1990. {
  1991. /* Update ADC state machine to error */
  1992. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
  1993. /* Set ADC error code to ADC peripheral internal error */
  1994. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  1995. return HAL_ERROR;
  1996. }
  1997. }
  1998. }
  1999. }
  2000. /* Return HAL status */
  2001. return HAL_OK;
  2002. }
  2003. /**
  2004. * @brief DMA transfer complete callback.
  2005. * @param hdma pointer to DMA handle.
  2006. * @retval None
  2007. */
  2008. static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
  2009. {
  2010. /* Retrieve ADC handle corresponding to current DMA handle */
  2011. ADC_HandleTypeDef *hadc = (ADC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  2012. /* Update state machine on conversion status if not in error state */
  2013. if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
  2014. {
  2015. /* Set ADC state */
  2016. SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
  2017. /* Determine whether any further conversion upcoming on group regular */
  2018. /* by external trigger, continuous mode or scan sequence on going. */
  2019. if (ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
  2020. (hadc->Init.ContinuousConvMode == DISABLE))
  2021. {
  2022. /* If End of Sequence is reached, disable interrupts */
  2023. if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS))
  2024. {
  2025. /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
  2026. /* ADSTART==0 (no conversion on going) */
  2027. if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
  2028. {
  2029. /* Disable ADC end of single conversion interrupt on group regular */
  2030. /* Note: Overrun interrupt was enabled with EOC interrupt in */
  2031. /* HAL_Start_IT(), but is not disabled here because can be used */
  2032. /* by overrun IRQ process below. */
  2033. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
  2034. /* Set ADC state */
  2035. ADC_STATE_CLR_SET(hadc->State,
  2036. HAL_ADC_STATE_REG_BUSY,
  2037. HAL_ADC_STATE_READY);
  2038. }
  2039. else
  2040. {
  2041. /* Change ADC state to error state */
  2042. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  2043. /* Set ADC error code to ADC peripheral internal error */
  2044. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  2045. }
  2046. }
  2047. }
  2048. /* Conversion complete callback */
  2049. #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
  2050. hadc->ConvCpltCallback(hadc);
  2051. #else
  2052. HAL_ADC_ConvCpltCallback(hadc);
  2053. #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
  2054. }
  2055. else
  2056. {
  2057. /* Call DMA error callback */
  2058. hadc->DMA_Handle->XferErrorCallback(hdma);
  2059. }
  2060. }
  2061. /**
  2062. * @brief DMA half transfer complete callback.
  2063. * @param hdma pointer to DMA handle.
  2064. * @retval None
  2065. */
  2066. static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
  2067. {
  2068. /* Retrieve ADC handle corresponding to current DMA handle */
  2069. ADC_HandleTypeDef *hadc = (ADC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  2070. /* Half conversion callback */
  2071. #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
  2072. hadc->ConvHalfCpltCallback(hadc);
  2073. #else
  2074. HAL_ADC_ConvHalfCpltCallback(hadc);
  2075. #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
  2076. }
  2077. /**
  2078. * @brief DMA error callback.
  2079. * @param hdma pointer to DMA handle.
  2080. * @retval None
  2081. */
  2082. static void ADC_DMAError(DMA_HandleTypeDef *hdma)
  2083. {
  2084. /* Retrieve ADC handle corresponding to current DMA handle */
  2085. ADC_HandleTypeDef *hadc = (ADC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  2086. /* Set ADC state */
  2087. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
  2088. /* Set ADC error code to DMA error */
  2089. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
  2090. /* Error callback */
  2091. #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
  2092. hadc->ErrorCallback(hadc);
  2093. #else
  2094. HAL_ADC_ErrorCallback(hadc);
  2095. #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
  2096. }
  2097. /**
  2098. * @brief Delay micro seconds
  2099. * @param microSecond delay
  2100. * @retval None
  2101. */
  2102. static void ADC_DelayMicroSecond(uint32_t microSecond)
  2103. {
  2104. /* Compute number of CPU cycles to wait for */
  2105. __IO uint32_t waitLoopIndex = (microSecond * (SystemCoreClock / 1000000U));
  2106. while (waitLoopIndex != 0U)
  2107. {
  2108. waitLoopIndex--;
  2109. }
  2110. }
  2111. /**
  2112. * @}
  2113. */
  2114. #endif /* HAL_ADC_MODULE_ENABLED */
  2115. /**
  2116. * @}
  2117. */
  2118. /**
  2119. * @}
  2120. */