stm32l4xx_hal_uart_ex.h 39 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_hal_uart_ex.h
  4. * @author MCD Application Team
  5. * @brief Header file of UART HAL Extended module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2017 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef STM32L4xx_HAL_UART_EX_H
  20. #define STM32L4xx_HAL_UART_EX_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32l4xx_hal_def.h"
  26. /** @addtogroup STM32L4xx_HAL_Driver
  27. * @{
  28. */
  29. /** @addtogroup UARTEx
  30. * @{
  31. */
  32. /* Exported types ------------------------------------------------------------*/
  33. /** @defgroup UARTEx_Exported_Types UARTEx Exported Types
  34. * @{
  35. */
  36. /**
  37. * @brief UART wake up from stop mode parameters
  38. */
  39. typedef struct
  40. {
  41. uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF).
  42. This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection.
  43. If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must
  44. be filled up. */
  45. uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long.
  46. This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */
  47. uint8_t Address; /*!< UART/USART node address (7-bit long max). */
  48. } UART_WakeUpTypeDef;
  49. /**
  50. * @}
  51. */
  52. /* Exported constants --------------------------------------------------------*/
  53. /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants
  54. * @{
  55. */
  56. /** @defgroup UARTEx_Word_Length UARTEx Word Length
  57. * @{
  58. */
  59. #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */
  60. #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */
  61. #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */
  62. /**
  63. * @}
  64. */
  65. /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length
  66. * @{
  67. */
  68. #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */
  69. #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */
  70. /**
  71. * @}
  72. */
  73. #if defined(USART_CR1_FIFOEN)
  74. /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode
  75. * @brief UART FIFO mode
  76. * @{
  77. */
  78. #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */
  79. #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */
  80. /**
  81. * @}
  82. */
  83. /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level
  84. * @brief UART TXFIFO threshold level
  85. * @{
  86. */
  87. #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TX FIFO reaches 1/8 of its depth */
  88. #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TX FIFO reaches 1/4 of its depth */
  89. #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TX FIFO reaches 1/2 of its depth */
  90. #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TX FIFO reaches 3/4 of its depth */
  91. #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TX FIFO reaches 7/8 of its depth */
  92. #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TX FIFO becomes empty */
  93. /**
  94. * @}
  95. */
  96. /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level
  97. * @brief UART RXFIFO threshold level
  98. * @{
  99. */
  100. #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RX FIFO reaches 1/8 of its depth */
  101. #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RX FIFO reaches 1/4 of its depth */
  102. #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RX FIFO reaches 1/2 of its depth */
  103. #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RX FIFO reaches 3/4 of its depth */
  104. #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RX FIFO reaches 7/8 of its depth */
  105. #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RX FIFO becomes full */
  106. /**
  107. * @}
  108. */
  109. #endif /* USART_CR1_FIFOEN */
  110. /**
  111. * @}
  112. */
  113. /* Exported macros -----------------------------------------------------------*/
  114. /* Exported functions --------------------------------------------------------*/
  115. /** @addtogroup UARTEx_Exported_Functions
  116. * @{
  117. */
  118. /** @addtogroup UARTEx_Exported_Functions_Group1
  119. * @{
  120. */
  121. /* Initialization and de-initialization functions ****************************/
  122. HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime,
  123. uint32_t DeassertionTime);
  124. /**
  125. * @}
  126. */
  127. /** @addtogroup UARTEx_Exported_Functions_Group2
  128. * @{
  129. */
  130. void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
  131. #if defined(USART_CR1_FIFOEN)
  132. void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart);
  133. void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart);
  134. #endif /* USART_CR1_FIFOEN */
  135. /**
  136. * @}
  137. */
  138. /** @addtogroup UARTEx_Exported_Functions_Group3
  139. * @{
  140. */
  141. /* Peripheral Control functions **********************************************/
  142. HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
  143. HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart);
  144. HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart);
  145. #if defined(USART_CR3_UCESM)
  146. HAL_StatusTypeDef HAL_UARTEx_EnableClockStopMode(UART_HandleTypeDef *huart);
  147. HAL_StatusTypeDef HAL_UARTEx_DisableClockStopMode(UART_HandleTypeDef *huart);
  148. #endif /* USART_CR3_UCESM */
  149. HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
  150. #if defined(USART_CR1_FIFOEN)
  151. HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart);
  152. HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart);
  153. HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold);
  154. HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold);
  155. #endif /* USART_CR1_FIFOEN */
  156. HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen,
  157. uint32_t Timeout);
  158. HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
  159. HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
  160. HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart);
  161. /**
  162. * @}
  163. */
  164. /**
  165. * @}
  166. */
  167. /* Private macros ------------------------------------------------------------*/
  168. /** @defgroup UARTEx_Private_Macros UARTEx Private Macros
  169. * @{
  170. */
  171. /** @brief Report the UART clock source.
  172. * @param __HANDLE__ specifies the UART Handle.
  173. * @param __CLOCKSOURCE__ output variable.
  174. * @retval UART clocking source, written in __CLOCKSOURCE__.
  175. */
  176. #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) \
  177. || defined (STM32L485xx) || defined (STM32L486xx) \
  178. || defined (STM32L496xx) || defined (STM32L4A6xx) \
  179. || defined (STM32L4P5xx) || defined (STM32L4Q5xx) \
  180. || defined (STM32L4R5xx) || defined (STM32L4R7xx) \
  181. || defined (STM32L4R9xx) || defined (STM32L4S5xx) \
  182. || defined (STM32L4S7xx) || defined (STM32L4S9xx)
  183. #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
  184. do { \
  185. if((__HANDLE__)->Instance == USART1) \
  186. { \
  187. switch(__HAL_RCC_GET_USART1_SOURCE()) \
  188. { \
  189. case RCC_USART1CLKSOURCE_PCLK2: \
  190. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
  191. break; \
  192. case RCC_USART1CLKSOURCE_HSI: \
  193. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  194. break; \
  195. case RCC_USART1CLKSOURCE_SYSCLK: \
  196. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  197. break; \
  198. case RCC_USART1CLKSOURCE_LSE: \
  199. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  200. break; \
  201. default: \
  202. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  203. break; \
  204. } \
  205. } \
  206. else if((__HANDLE__)->Instance == USART2) \
  207. { \
  208. switch(__HAL_RCC_GET_USART2_SOURCE()) \
  209. { \
  210. case RCC_USART2CLKSOURCE_PCLK1: \
  211. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  212. break; \
  213. case RCC_USART2CLKSOURCE_HSI: \
  214. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  215. break; \
  216. case RCC_USART2CLKSOURCE_SYSCLK: \
  217. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  218. break; \
  219. case RCC_USART2CLKSOURCE_LSE: \
  220. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  221. break; \
  222. default: \
  223. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  224. break; \
  225. } \
  226. } \
  227. else if((__HANDLE__)->Instance == USART3) \
  228. { \
  229. switch(__HAL_RCC_GET_USART3_SOURCE()) \
  230. { \
  231. case RCC_USART3CLKSOURCE_PCLK1: \
  232. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  233. break; \
  234. case RCC_USART3CLKSOURCE_HSI: \
  235. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  236. break; \
  237. case RCC_USART3CLKSOURCE_SYSCLK: \
  238. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  239. break; \
  240. case RCC_USART3CLKSOURCE_LSE: \
  241. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  242. break; \
  243. default: \
  244. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  245. break; \
  246. } \
  247. } \
  248. else if((__HANDLE__)->Instance == UART4) \
  249. { \
  250. switch(__HAL_RCC_GET_UART4_SOURCE()) \
  251. { \
  252. case RCC_UART4CLKSOURCE_PCLK1: \
  253. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  254. break; \
  255. case RCC_UART4CLKSOURCE_HSI: \
  256. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  257. break; \
  258. case RCC_UART4CLKSOURCE_SYSCLK: \
  259. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  260. break; \
  261. case RCC_UART4CLKSOURCE_LSE: \
  262. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  263. break; \
  264. default: \
  265. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  266. break; \
  267. } \
  268. } \
  269. else if((__HANDLE__)->Instance == UART5) \
  270. { \
  271. switch(__HAL_RCC_GET_UART5_SOURCE()) \
  272. { \
  273. case RCC_UART5CLKSOURCE_PCLK1: \
  274. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  275. break; \
  276. case RCC_UART5CLKSOURCE_HSI: \
  277. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  278. break; \
  279. case RCC_UART5CLKSOURCE_SYSCLK: \
  280. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  281. break; \
  282. case RCC_UART5CLKSOURCE_LSE: \
  283. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  284. break; \
  285. default: \
  286. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  287. break; \
  288. } \
  289. } \
  290. else if((__HANDLE__)->Instance == LPUART1) \
  291. { \
  292. switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
  293. { \
  294. case RCC_LPUART1CLKSOURCE_PCLK1: \
  295. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  296. break; \
  297. case RCC_LPUART1CLKSOURCE_HSI: \
  298. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  299. break; \
  300. case RCC_LPUART1CLKSOURCE_SYSCLK: \
  301. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  302. break; \
  303. case RCC_LPUART1CLKSOURCE_LSE: \
  304. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  305. break; \
  306. default: \
  307. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  308. break; \
  309. } \
  310. } \
  311. else \
  312. { \
  313. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  314. } \
  315. } while(0U)
  316. #elif defined (STM32L412xx) || defined (STM32L422xx) \
  317. || defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx)
  318. #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
  319. do { \
  320. if((__HANDLE__)->Instance == USART1) \
  321. { \
  322. switch(__HAL_RCC_GET_USART1_SOURCE()) \
  323. { \
  324. case RCC_USART1CLKSOURCE_PCLK2: \
  325. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
  326. break; \
  327. case RCC_USART1CLKSOURCE_HSI: \
  328. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  329. break; \
  330. case RCC_USART1CLKSOURCE_SYSCLK: \
  331. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  332. break; \
  333. case RCC_USART1CLKSOURCE_LSE: \
  334. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  335. break; \
  336. default: \
  337. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  338. break; \
  339. } \
  340. } \
  341. else if((__HANDLE__)->Instance == USART2) \
  342. { \
  343. switch(__HAL_RCC_GET_USART2_SOURCE()) \
  344. { \
  345. case RCC_USART2CLKSOURCE_PCLK1: \
  346. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  347. break; \
  348. case RCC_USART2CLKSOURCE_HSI: \
  349. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  350. break; \
  351. case RCC_USART2CLKSOURCE_SYSCLK: \
  352. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  353. break; \
  354. case RCC_USART2CLKSOURCE_LSE: \
  355. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  356. break; \
  357. default: \
  358. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  359. break; \
  360. } \
  361. } \
  362. else if((__HANDLE__)->Instance == USART3) \
  363. { \
  364. switch(__HAL_RCC_GET_USART3_SOURCE()) \
  365. { \
  366. case RCC_USART3CLKSOURCE_PCLK1: \
  367. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  368. break; \
  369. case RCC_USART3CLKSOURCE_HSI: \
  370. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  371. break; \
  372. case RCC_USART3CLKSOURCE_SYSCLK: \
  373. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  374. break; \
  375. case RCC_USART3CLKSOURCE_LSE: \
  376. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  377. break; \
  378. default: \
  379. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  380. break; \
  381. } \
  382. } \
  383. else if((__HANDLE__)->Instance == LPUART1) \
  384. { \
  385. switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
  386. { \
  387. case RCC_LPUART1CLKSOURCE_PCLK1: \
  388. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  389. break; \
  390. case RCC_LPUART1CLKSOURCE_HSI: \
  391. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  392. break; \
  393. case RCC_LPUART1CLKSOURCE_SYSCLK: \
  394. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  395. break; \
  396. case RCC_LPUART1CLKSOURCE_LSE: \
  397. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  398. break; \
  399. default: \
  400. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  401. break; \
  402. } \
  403. } \
  404. else \
  405. { \
  406. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  407. } \
  408. } while(0U)
  409. #elif defined (STM32L432xx) || defined (STM32L442xx)
  410. #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
  411. do { \
  412. if((__HANDLE__)->Instance == USART1) \
  413. { \
  414. switch(__HAL_RCC_GET_USART1_SOURCE()) \
  415. { \
  416. case RCC_USART1CLKSOURCE_PCLK2: \
  417. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
  418. break; \
  419. case RCC_USART1CLKSOURCE_HSI: \
  420. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  421. break; \
  422. case RCC_USART1CLKSOURCE_SYSCLK: \
  423. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  424. break; \
  425. case RCC_USART1CLKSOURCE_LSE: \
  426. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  427. break; \
  428. default: \
  429. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  430. break; \
  431. } \
  432. } \
  433. else if((__HANDLE__)->Instance == USART2) \
  434. { \
  435. switch(__HAL_RCC_GET_USART2_SOURCE()) \
  436. { \
  437. case RCC_USART2CLKSOURCE_PCLK1: \
  438. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  439. break; \
  440. case RCC_USART2CLKSOURCE_HSI: \
  441. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  442. break; \
  443. case RCC_USART2CLKSOURCE_SYSCLK: \
  444. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  445. break; \
  446. case RCC_USART2CLKSOURCE_LSE: \
  447. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  448. break; \
  449. default: \
  450. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  451. break; \
  452. } \
  453. } \
  454. else if((__HANDLE__)->Instance == LPUART1) \
  455. { \
  456. switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
  457. { \
  458. case RCC_LPUART1CLKSOURCE_PCLK1: \
  459. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  460. break; \
  461. case RCC_LPUART1CLKSOURCE_HSI: \
  462. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  463. break; \
  464. case RCC_LPUART1CLKSOURCE_SYSCLK: \
  465. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  466. break; \
  467. case RCC_LPUART1CLKSOURCE_LSE: \
  468. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  469. break; \
  470. default: \
  471. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  472. break; \
  473. } \
  474. } \
  475. else \
  476. { \
  477. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  478. } \
  479. } while(0U)
  480. #elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
  481. #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
  482. do { \
  483. if((__HANDLE__)->Instance == USART1) \
  484. { \
  485. switch(__HAL_RCC_GET_USART1_SOURCE()) \
  486. { \
  487. case RCC_USART1CLKSOURCE_PCLK2: \
  488. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
  489. break; \
  490. case RCC_USART1CLKSOURCE_HSI: \
  491. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  492. break; \
  493. case RCC_USART1CLKSOURCE_SYSCLK: \
  494. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  495. break; \
  496. case RCC_USART1CLKSOURCE_LSE: \
  497. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  498. break; \
  499. default: \
  500. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  501. break; \
  502. } \
  503. } \
  504. else if((__HANDLE__)->Instance == USART2) \
  505. { \
  506. switch(__HAL_RCC_GET_USART2_SOURCE()) \
  507. { \
  508. case RCC_USART2CLKSOURCE_PCLK1: \
  509. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  510. break; \
  511. case RCC_USART2CLKSOURCE_HSI: \
  512. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  513. break; \
  514. case RCC_USART2CLKSOURCE_SYSCLK: \
  515. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  516. break; \
  517. case RCC_USART2CLKSOURCE_LSE: \
  518. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  519. break; \
  520. default: \
  521. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  522. break; \
  523. } \
  524. } \
  525. else if((__HANDLE__)->Instance == USART3) \
  526. { \
  527. switch(__HAL_RCC_GET_USART3_SOURCE()) \
  528. { \
  529. case RCC_USART3CLKSOURCE_PCLK1: \
  530. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  531. break; \
  532. case RCC_USART3CLKSOURCE_HSI: \
  533. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  534. break; \
  535. case RCC_USART3CLKSOURCE_SYSCLK: \
  536. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  537. break; \
  538. case RCC_USART3CLKSOURCE_LSE: \
  539. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  540. break; \
  541. default: \
  542. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  543. break; \
  544. } \
  545. } \
  546. else if((__HANDLE__)->Instance == UART4) \
  547. { \
  548. switch(__HAL_RCC_GET_UART4_SOURCE()) \
  549. { \
  550. case RCC_UART4CLKSOURCE_PCLK1: \
  551. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  552. break; \
  553. case RCC_UART4CLKSOURCE_HSI: \
  554. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  555. break; \
  556. case RCC_UART4CLKSOURCE_SYSCLK: \
  557. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  558. break; \
  559. case RCC_UART4CLKSOURCE_LSE: \
  560. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  561. break; \
  562. default: \
  563. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  564. break; \
  565. } \
  566. } \
  567. else if((__HANDLE__)->Instance == LPUART1) \
  568. { \
  569. switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
  570. { \
  571. case RCC_LPUART1CLKSOURCE_PCLK1: \
  572. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  573. break; \
  574. case RCC_LPUART1CLKSOURCE_HSI: \
  575. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  576. break; \
  577. case RCC_LPUART1CLKSOURCE_SYSCLK: \
  578. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  579. break; \
  580. case RCC_LPUART1CLKSOURCE_LSE: \
  581. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  582. break; \
  583. default: \
  584. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  585. break; \
  586. } \
  587. } \
  588. else \
  589. { \
  590. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  591. } \
  592. } while(0U)
  593. #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx ||
  594. * STM32L496xx || STM32L4A6xx ||
  595. * STM32L4P5xx || STM32L4Q5xx ||
  596. * STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx
  597. */
  598. /** @brief Report the UART mask to apply to retrieve the received data
  599. * according to the word length and to the parity bits activation.
  600. * @note If PCE = 1, the parity bit is not included in the data extracted
  601. * by the reception API().
  602. * This masking operation is not carried out in the case of
  603. * DMA transfers.
  604. * @param __HANDLE__ specifies the UART Handle.
  605. * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field.
  606. */
  607. #define UART_MASK_COMPUTATION(__HANDLE__) \
  608. do { \
  609. if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
  610. { \
  611. if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
  612. { \
  613. (__HANDLE__)->Mask = 0x01FFU ; \
  614. } \
  615. else \
  616. { \
  617. (__HANDLE__)->Mask = 0x00FFU ; \
  618. } \
  619. } \
  620. else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
  621. { \
  622. if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
  623. { \
  624. (__HANDLE__)->Mask = 0x00FFU ; \
  625. } \
  626. else \
  627. { \
  628. (__HANDLE__)->Mask = 0x007FU ; \
  629. } \
  630. } \
  631. else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \
  632. { \
  633. if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
  634. { \
  635. (__HANDLE__)->Mask = 0x007FU ; \
  636. } \
  637. else \
  638. { \
  639. (__HANDLE__)->Mask = 0x003FU ; \
  640. } \
  641. } \
  642. else \
  643. { \
  644. (__HANDLE__)->Mask = 0x0000U; \
  645. } \
  646. } while(0U)
  647. /**
  648. * @brief Ensure that UART frame length is valid.
  649. * @param __LENGTH__ UART frame length.
  650. * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
  651. */
  652. #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \
  653. ((__LENGTH__) == UART_WORDLENGTH_8B) || \
  654. ((__LENGTH__) == UART_WORDLENGTH_9B))
  655. /**
  656. * @brief Ensure that UART wake-up address length is valid.
  657. * @param __ADDRESS__ UART wake-up address length.
  658. * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid)
  659. */
  660. #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \
  661. ((__ADDRESS__) == UART_ADDRESS_DETECT_7B))
  662. #if defined(USART_CR1_FIFOEN)
  663. /**
  664. * @brief Ensure that UART TXFIFO threshold level is valid.
  665. * @param __THRESHOLD__ UART TXFIFO threshold level.
  666. * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
  667. */
  668. #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \
  669. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \
  670. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \
  671. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \
  672. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \
  673. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8))
  674. /**
  675. * @brief Ensure that UART RXFIFO threshold level is valid.
  676. * @param __THRESHOLD__ UART RXFIFO threshold level.
  677. * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
  678. */
  679. #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \
  680. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \
  681. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \
  682. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \
  683. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \
  684. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8))
  685. #endif /* USART_CR1_FIFOEN */
  686. /**
  687. * @}
  688. */
  689. /* Private functions ---------------------------------------------------------*/
  690. /**
  691. * @}
  692. */
  693. /**
  694. * @}
  695. */
  696. #ifdef __cplusplus
  697. }
  698. #endif
  699. #endif /* STM32L4xx_HAL_UART_EX_H */